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1076969bfe
Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323922 91177308-0d34-0410-b5e6-96231b3b80d8
53 lines
1.3 KiB
YAML
53 lines
1.3 KiB
YAML
# RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 -start-before=postrapseudos %s -o - \
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# RUN: | FileCheck %s
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#
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# Check that integer load and test instructions are not emitted for unsigned
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# comparisons unless checking for equality. That would be wrong, since the
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# operands are implicitly treated as signed values.
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# Not legal: Logical comparison used for >= (CCMask is 10).
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# CHECK-LABEL: fun0
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# CHECK-NOT: lt
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---
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name: fun0
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tracksRegLiveness: true
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body: |
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bb.0 ():
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liveins: $r1d
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renamable $r0l = L $r1d, 0, $noreg
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CLFIMux killed renamable $r0l, 0, implicit-def $cc
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BRC 14, 10, %bb.2, implicit $cc
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bb.1 ():
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liveins: $r0l
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ST killed renamable $r0l, $r15d, 164, $noreg
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bb.2 ():
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liveins: $r0l
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ST killed renamable $r0l, $r15d, 164, $noreg
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Return
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...
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# Legal: Logical comparison used for == (CCMask is 8).
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# CHECK-LABEL: fun1
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# CHECK: lt
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---
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name: fun1
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tracksRegLiveness: true
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body: |
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bb.0 ():
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liveins: $r1d
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renamable $r0l = L $r1d, 0, $noreg
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CLFIMux killed renamable $r0l, 0, implicit-def $cc
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BRC 14, 8, %bb.2, implicit $cc
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bb.1 ():
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liveins: $r0l
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ST killed renamable $r0l, $r15d, 164, $noreg
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bb.2 ():
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liveins: $r0l
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ST killed renamable $r0l, $r15d, 164, $noreg
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Return
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...
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