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e536396218
------------------------------------------------------------------------ r292982 | arsenm | 2017-01-24 14:02:15 -0800 (Tue, 24 Jan 2017) | 8 lines Enable FeatureFlatForGlobal on Volcanic Islands This switches to the workaround that HSA defaults to for the mesa path. This should be applied to the 4.0 branch. Patch by Vedran Miletić <vedran@miletic.net> ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_40@293326 91177308-0d34-0410-b5e6-96231b3b80d8
186 lines
4.8 KiB
LLVM
186 lines
4.8 KiB
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck %s
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; CHECK-LABEL: {{^}}inline_asm:
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; CHECK: s_endpgm
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; CHECK: s_endpgm
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define void @inline_asm(i32 addrspace(1)* %out) {
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entry:
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store i32 5, i32 addrspace(1)* %out
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call void asm sideeffect "s_endpgm", ""()
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ret void
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}
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; CHECK-LABEL: {{^}}inline_asm_shader:
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; CHECK: s_endpgm
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; CHECK: s_endpgm
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define amdgpu_ps void @inline_asm_shader() {
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entry:
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call void asm sideeffect "s_endpgm", ""()
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ret void
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}
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; CHECK: {{^}}branch_on_asm:
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; Make sure inline assembly is treted as divergent.
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; CHECK: s_mov_b32 s{{[0-9]+}}, 0
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; CHECK: s_and_saveexec_b64
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define void @branch_on_asm(i32 addrspace(1)* %out) {
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%zero = call i32 asm "s_mov_b32 $0, 0", "=s"()
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%cmp = icmp eq i32 %zero, 0
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br i1 %cmp, label %if, label %endif
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if:
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store i32 0, i32 addrspace(1)* %out
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br label %endif
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endif:
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ret void
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}
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; CHECK-LABEL: {{^}}v_cmp_asm:
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; CHECK: v_mov_b32_e32 [[SRC:v[0-9]+]], s{{[0-9]+}}
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; CHECK: v_cmp_ne_u32_e64 s{{\[}}[[MASK_LO:[0-9]+]]:[[MASK_HI:[0-9]+]]{{\]}}, 0, [[SRC]]
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; CHECK-DAG: v_mov_b32_e32 v[[V_LO:[0-9]+]], s[[MASK_LO]]
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; CHECK-DAG: v_mov_b32_e32 v[[V_HI:[0-9]+]], s[[MASK_HI]]
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; CHECK: buffer_store_dwordx2 v{{\[}}[[V_LO]]:[[V_HI]]{{\]}}
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define void @v_cmp_asm(i64 addrspace(1)* %out, i32 %in) {
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%sgpr = tail call i64 asm "v_cmp_ne_u32_e64 $0, 0, $1", "=s,v"(i32 %in)
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store i64 %sgpr, i64 addrspace(1)* %out
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ret void
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}
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; CHECK-LABEL: {{^}}code_size_inline_asm:
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; CHECK: codeLenInByte = 12
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define void @code_size_inline_asm(i32 addrspace(1)* %out) {
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entry:
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call void asm sideeffect "v_nop_e64", ""()
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ret void
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}
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; All inlineasm instructions are assumed to be the maximum size
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; CHECK-LABEL: {{^}}code_size_inline_asm_small_inst:
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; CHECK: codeLenInByte = 12
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define void @code_size_inline_asm_small_inst(i32 addrspace(1)* %out) {
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entry:
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call void asm sideeffect "v_nop_e32", ""()
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ret void
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}
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; CHECK-LABEL: {{^}}code_size_inline_asm_2_inst:
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; CHECK: codeLenInByte = 20
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define void @code_size_inline_asm_2_inst(i32 addrspace(1)* %out) {
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entry:
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call void asm sideeffect "
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v_nop_e64
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v_nop_e64
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", ""()
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ret void
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}
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; CHECK-LABEL: {{^}}code_size_inline_asm_2_inst_extra_newline:
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; CHECK: codeLenInByte = 20
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define void @code_size_inline_asm_2_inst_extra_newline(i32 addrspace(1)* %out) {
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entry:
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call void asm sideeffect "
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v_nop_e64
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v_nop_e64
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", ""()
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ret void
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}
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; CHECK-LABEL: {{^}}code_size_inline_asm_0_inst:
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; CHECK: codeLenInByte = 4
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define void @code_size_inline_asm_0_inst(i32 addrspace(1)* %out) {
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entry:
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call void asm sideeffect "", ""()
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ret void
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}
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; CHECK-LABEL: {{^}}code_size_inline_asm_1_comment:
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; CHECK: codeLenInByte = 4
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define void @code_size_inline_asm_1_comment(i32 addrspace(1)* %out) {
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entry:
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call void asm sideeffect "; comment", ""()
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ret void
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}
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; CHECK-LABEL: {{^}}code_size_inline_asm_newline_1_comment:
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; CHECK: codeLenInByte = 4
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define void @code_size_inline_asm_newline_1_comment(i32 addrspace(1)* %out) {
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entry:
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call void asm sideeffect "
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; comment", ""()
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ret void
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}
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; CHECK-LABEL: {{^}}code_size_inline_asm_1_comment_newline:
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; CHECK: codeLenInByte = 4
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define void @code_size_inline_asm_1_comment_newline(i32 addrspace(1)* %out) {
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entry:
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call void asm sideeffect "; comment
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", ""()
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ret void
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}
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; CHECK-LABEL: {{^}}code_size_inline_asm_2_comments_line:
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; CHECK: codeLenInByte = 4
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define void @code_size_inline_asm_2_comments_line(i32 addrspace(1)* %out) {
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entry:
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call void asm sideeffect "; first comment ; second comment", ""()
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ret void
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}
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; CHECK-LABEL: {{^}}code_size_inline_asm_2_comments_line_nospace:
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; CHECK: codeLenInByte = 4
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define void @code_size_inline_asm_2_comments_line_nospace(i32 addrspace(1)* %out) {
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entry:
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call void asm sideeffect "; first comment;second comment", ""()
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ret void
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}
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; CHECK-LABEL: {{^}}code_size_inline_asm_mixed_comments0:
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; CHECK: codeLenInByte = 20
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define void @code_size_inline_asm_mixed_comments0(i32 addrspace(1)* %out) {
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entry:
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call void asm sideeffect "; comment
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v_nop_e64 ; inline comment
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; separate comment
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v_nop_e64
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; trailing comment
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; extra comment
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", ""()
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ret void
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}
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; CHECK-LABEL: {{^}}code_size_inline_asm_mixed_comments1:
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; CHECK: codeLenInByte = 20
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define void @code_size_inline_asm_mixed_comments1(i32 addrspace(1)* %out) {
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entry:
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call void asm sideeffect "v_nop_e64 ; inline comment
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; separate comment
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v_nop_e64
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; trailing comment
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; extra comment
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", ""()
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ret void
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}
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; CHECK-LABEL: {{^}}code_size_inline_asm_mixed_comments_operands:
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; CHECK: codeLenInByte = 20
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define void @code_size_inline_asm_mixed_comments_operands(i32 addrspace(1)* %out) {
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entry:
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call void asm sideeffect "; comment
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v_add_i32_e32 v0, vcc, v1, v2 ; inline comment
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; separate comment
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v_bfrev_b32_e32 v0, 1
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; trailing comment
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; extra comment
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", ""()
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ret void
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}
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