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e536396218
------------------------------------------------------------------------ r292982 | arsenm | 2017-01-24 14:02:15 -0800 (Tue, 24 Jan 2017) | 8 lines Enable FeatureFlatForGlobal on Volcanic Islands This switches to the workaround that HSA defaults to for the mesa path. This should be applied to the 4.0 branch. Patch by Vedran Miletić <vedran@miletic.net> ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_40@293326 91177308-0d34-0410-b5e6-96231b3b80d8
129 lines
4.3 KiB
LLVM
129 lines
4.3 KiB
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=cayman -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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; FUNC-LABEL: {{^}}rcp_pat_f32:
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; GCN: s_load_dword [[SRC:s[0-9]+]]
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; GCN: v_rcp_f32_e32 [[RCP:v[0-9]+]], [[SRC]]
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; GCN: buffer_store_dword [[RCP]]
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; EG: RECIP_IEEE
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define void @rcp_pat_f32(float addrspace(1)* %out, float %src) #0 {
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%rcp = fdiv float 1.0, %src
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store float %rcp, float addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}rcp_ulp25_pat_f32:
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; GCN: s_load_dword [[SRC:s[0-9]+]]
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; GCN: v_rcp_f32_e32 [[RCP:v[0-9]+]], [[SRC]]
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; GCN: buffer_store_dword [[RCP]]
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; EG: RECIP_IEEE
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define void @rcp_ulp25_pat_f32(float addrspace(1)* %out, float %src) #0 {
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%rcp = fdiv float 1.0, %src, !fpmath !0
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store float %rcp, float addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}rcp_fast_ulp25_pat_f32:
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; GCN: s_load_dword [[SRC:s[0-9]+]]
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; GCN: v_rcp_f32_e32 [[RCP:v[0-9]+]], [[SRC]]
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; GCN: buffer_store_dword [[RCP]]
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; EG: RECIP_IEEE
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define void @rcp_fast_ulp25_pat_f32(float addrspace(1)* %out, float %src) #0 {
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%rcp = fdiv fast float 1.0, %src, !fpmath !0
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store float %rcp, float addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}rcp_arcp_ulp25_pat_f32:
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; GCN: s_load_dword [[SRC:s[0-9]+]]
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; GCN: v_rcp_f32_e32 [[RCP:v[0-9]+]], [[SRC]]
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; GCN: buffer_store_dword [[RCP]]
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; EG: RECIP_IEEE
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define void @rcp_arcp_ulp25_pat_f32(float addrspace(1)* %out, float %src) #0 {
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%rcp = fdiv arcp float 1.0, %src, !fpmath !0
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store float %rcp, float addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}rcp_global_fast_ulp25_pat_f32:
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; GCN: s_load_dword [[SRC:s[0-9]+]]
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; GCN: v_rcp_f32_e32 [[RCP:v[0-9]+]], [[SRC]]
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; GCN: buffer_store_dword [[RCP]]
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; EG: RECIP_IEEE
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define void @rcp_global_fast_ulp25_pat_f32(float addrspace(1)* %out, float %src) #2 {
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%rcp = fdiv float 1.0, %src, !fpmath !0
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store float %rcp, float addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}rcp_fabs_pat_f32:
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; GCN: s_load_dword [[SRC:s[0-9]+]]
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; GCN: v_rcp_f32_e64 [[RCP:v[0-9]+]], |[[SRC]]|
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; GCN: buffer_store_dword [[RCP]]
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; EG: RECIP_IEEE
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define void @rcp_fabs_pat_f32(float addrspace(1)* %out, float %src) #0 {
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%src.fabs = call float @llvm.fabs.f32(float %src)
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%rcp = fdiv float 1.0, %src.fabs
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store float %rcp, float addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}neg_rcp_pat_f32:
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; GCN: s_load_dword [[SRC:s[0-9]+]]
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; GCN: v_rcp_f32_e64 [[RCP:v[0-9]+]], -[[SRC]]
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; GCN: buffer_store_dword [[RCP]]
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; EG: RECIP_IEEE
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define void @neg_rcp_pat_f32(float addrspace(1)* %out, float %src) #0 {
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%rcp = fdiv float -1.0, %src
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store float %rcp, float addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}rcp_fabs_fneg_pat_f32:
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; GCN: s_load_dword [[SRC:s[0-9]+]]
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; GCN: v_rcp_f32_e64 [[RCP:v[0-9]+]], -|[[SRC]]|
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; GCN: buffer_store_dword [[RCP]]
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define void @rcp_fabs_fneg_pat_f32(float addrspace(1)* %out, float %src) #0 {
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%src.fabs = call float @llvm.fabs.f32(float %src)
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%src.fabs.fneg = fsub float -0.0, %src.fabs
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%rcp = fdiv float 1.0, %src.fabs.fneg
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store float %rcp, float addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}rcp_fabs_fneg_pat_multi_use_f32:
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; GCN: s_load_dword [[SRC:s[0-9]+]]
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; GCN: v_rcp_f32_e64 [[RCP:v[0-9]+]], -|[[SRC]]|
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; GCN: v_mul_f32_e64 [[MUL:v[0-9]+]], [[SRC]], -|[[SRC]]|
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; GCN: buffer_store_dword [[RCP]]
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; GCN: buffer_store_dword [[MUL]]
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define void @rcp_fabs_fneg_pat_multi_use_f32(float addrspace(1)* %out, float %src) #0 {
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%src.fabs = call float @llvm.fabs.f32(float %src)
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%src.fabs.fneg = fsub float -0.0, %src.fabs
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%rcp = fdiv float 1.0, %src.fabs.fneg
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store volatile float %rcp, float addrspace(1)* %out, align 4
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%other = fmul float %src, %src.fabs.fneg
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store volatile float %other, float addrspace(1)* %out, align 4
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ret void
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}
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declare float @llvm.fabs.f32(float) #1
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declare float @llvm.sqrt.f32(float) #1
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attributes #0 = { nounwind "unsafe-fp-math"="false" }
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attributes #1 = { nounwind readnone }
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attributes #2 = { nounwind "unsafe-fp-math"="true" }
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!0 = !{float 2.500000e+00}
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