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e536396218
------------------------------------------------------------------------ r292982 | arsenm | 2017-01-24 14:02:15 -0800 (Tue, 24 Jan 2017) | 8 lines Enable FeatureFlatForGlobal on Volcanic Islands This switches to the workaround that HSA defaults to for the mesa path. This should be applied to the 4.0 branch. Patch by Vedran Miletić <vedran@miletic.net> ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_40@293326 91177308-0d34-0410-b5e6-96231b3b80d8
288 lines
9.5 KiB
LLVM
288 lines
9.5 KiB
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=GCN -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=GCN -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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; FUNC-LABEL: {{^}}sext_bool_icmp_eq_0:
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; GCN-NOT: v_cmp
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; GCN: v_cmp_ne_u32_e32 vcc,
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; GCN-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, vcc
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; GCN-NEXT:buffer_store_byte [[RESULT]]
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; GCN-NEXT: s_endpgm
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; EG: SETNE_INT * [[CMP:T[0-9]+]].[[CMPCHAN:[XYZW]]], KC0[2].Z, KC0[2].W
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; EG: AND_INT T{{[0-9]+.[XYZW]}}, PS, 1
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define void @sext_bool_icmp_eq_0(i1 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
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%icmp0 = icmp eq i32 %a, %b
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%ext = sext i1 %icmp0 to i32
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%icmp1 = icmp eq i32 %ext, 0
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store i1 %icmp1, i1 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}sext_bool_icmp_ne_0:
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; GCN-NOT: v_cmp
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; GCN: v_cmp_ne_u32_e32 vcc,
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; GCN-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, vcc
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; GCN-NEXT: buffer_store_byte [[RESULT]]
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; GCN-NEXT: s_endpgm
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; EG: SETNE_INT * [[CMP:T[0-9]+]].[[CMPCHAN:[XYZW]]], KC0[2].Z, KC0[2].W
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; EG: AND_INT T{{[0-9]+.[XYZW]}}, PS, 1
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define void @sext_bool_icmp_ne_0(i1 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
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%icmp0 = icmp ne i32 %a, %b
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%ext = sext i1 %icmp0 to i32
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%icmp1 = icmp ne i32 %ext, 0
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store i1 %icmp1, i1 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}sext_bool_icmp_eq_neg1:
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; GCN-NOT: v_cmp
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; GCN: v_cmp_eq_u32_e32 vcc,
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; GCN-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, vcc
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; GCN-NEXT: buffer_store_byte [[RESULT]]
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; GCN-NEXT: s_endpgm
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define void @sext_bool_icmp_eq_neg1(i1 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
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%icmp0 = icmp eq i32 %a, %b
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%ext = sext i1 %icmp0 to i32
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%icmp1 = icmp eq i32 %ext, -1
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store i1 %icmp1, i1 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}sext_bool_icmp_ne_neg1:
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; GCN-NOT: v_cmp
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; GCN: v_cmp_eq_u32_e32 vcc,
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; GCN-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, vcc
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; GCN-NEXT: buffer_store_byte [[RESULT]]
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; GCN-NEXT: s_endpgm
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define void @sext_bool_icmp_ne_neg1(i1 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
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%icmp0 = icmp ne i32 %a, %b
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%ext = sext i1 %icmp0 to i32
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%icmp1 = icmp ne i32 %ext, -1
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store i1 %icmp1, i1 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}zext_bool_icmp_eq_0:
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; GCN-NOT: v_cmp
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; GCN: v_cmp_ne_u32_e32 vcc,
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; GCN-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, vcc
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; GCN-NEXT: buffer_store_byte [[RESULT]]
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; GCN-NEXT: s_endpgm
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define void @zext_bool_icmp_eq_0(i1 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
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%icmp0 = icmp eq i32 %a, %b
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%ext = zext i1 %icmp0 to i32
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%icmp1 = icmp eq i32 %ext, 0
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store i1 %icmp1, i1 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}zext_bool_icmp_ne_0:
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; GCN-NOT: v_cmp
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; GCN: v_cmp_ne_u32_e32 vcc,
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; GCN-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, vcc
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; GCN-NEXT: buffer_store_byte [[RESULT]]
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; GCN-NEXT: s_endpgm
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define void @zext_bool_icmp_ne_0(i1 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
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%icmp0 = icmp ne i32 %a, %b
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%ext = zext i1 %icmp0 to i32
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%icmp1 = icmp ne i32 %ext, 0
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store i1 %icmp1, i1 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}zext_bool_icmp_eq_1:
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; GCN-NOT: v_cmp
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; GCN: v_cmp_eq_u32_e32 vcc,
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; GCN-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, vcc
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; GCN-NEXT: buffer_store_byte [[RESULT]]
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; GCN-NEXT: s_endpgm
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define void @zext_bool_icmp_eq_1(i1 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
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%icmp0 = icmp eq i32 %a, %b
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%ext = zext i1 %icmp0 to i32
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%icmp1 = icmp eq i32 %ext, 1
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store i1 %icmp1, i1 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}zext_bool_icmp_ne_1:
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; GCN-NOT: v_cmp
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; GCN: v_cmp_eq_u32_e32 vcc,
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; GCN-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, vcc
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; GCN-NEXT: buffer_store_byte [[RESULT]]
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define void @zext_bool_icmp_ne_1(i1 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
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%icmp0 = icmp ne i32 %a, %b
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%ext = zext i1 %icmp0 to i32
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%icmp1 = icmp ne i32 %ext, 1
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store i1 %icmp1, i1 addrspace(1)* %out
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ret void
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}
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; Reduces to false:
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; FUNC-LABEL: {{^}}zext_bool_icmp_eq_neg1:
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; GCN: v_mov_b32_e32 [[TMP:v[0-9]+]], 0{{$}}
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; GCN: buffer_store_byte [[TMP]]
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; GCN-NEXT: s_endpgm
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define void @zext_bool_icmp_eq_neg1(i1 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
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%icmp0 = icmp eq i32 %a, %b
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%ext = zext i1 %icmp0 to i32
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%icmp1 = icmp eq i32 %ext, -1
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store i1 %icmp1, i1 addrspace(1)* %out
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ret void
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}
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; Reduces to true:
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; FUNC-LABEL: {{^}}zext_bool_icmp_ne_neg1:
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; GCN: v_mov_b32_e32 [[TMP:v[0-9]+]], 1{{$}}
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; GCN: buffer_store_byte [[TMP]]
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; GCN-NEXT: s_endpgm
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define void @zext_bool_icmp_ne_neg1(i1 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
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%icmp0 = icmp ne i32 %a, %b
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%ext = zext i1 %icmp0 to i32
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%icmp1 = icmp ne i32 %ext, -1
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store i1 %icmp1, i1 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}cmp_zext_k_i8max:
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; SI: s_load_dword [[VALUE:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
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; VI: s_load_dword [[VALUE:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x2c
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; GCN: s_movk_i32 [[K255:s[0-9]+]], 0xff
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; GCN-DAG: v_mov_b32_e32 [[VK255:v[0-9]+]], [[K255]]
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; SI-DAG: s_and_b32 [[B:s[0-9]+]], [[VALUE]], [[K255]]
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; SI: v_cmp_ne_u32_e32 vcc, [[B]], [[VK255]]
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; VI-DAG: v_and_b32_e32 [[B:v[0-9]+]], [[VALUE]], [[VK255]]
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; VI: v_cmp_ne_u16_e32 vcc, [[K255]], [[B]]
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; GCN: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, vcc
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; GCN: buffer_store_byte [[RESULT]]
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; GCN: s_endpgm
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define void @cmp_zext_k_i8max(i1 addrspace(1)* %out, i8 %b) nounwind {
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%b.ext = zext i8 %b to i32
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%icmp0 = icmp ne i32 %b.ext, 255
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store i1 %icmp0, i1 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}cmp_sext_k_neg1:
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; GCN: buffer_load_sbyte [[B:v[0-9]+]]
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; GCN: v_cmp_ne_u32_e32 vcc, -1, [[B]]{{$}}
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; GCN-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, vcc
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; GCN: buffer_store_byte [[RESULT]]
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; GCN: s_endpgm
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define void @cmp_sext_k_neg1(i1 addrspace(1)* %out, i8 addrspace(1)* %b.ptr) nounwind {
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%b = load i8, i8 addrspace(1)* %b.ptr
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%b.ext = sext i8 %b to i32
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%icmp0 = icmp ne i32 %b.ext, -1
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store i1 %icmp0, i1 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}cmp_sext_k_neg1_i8_sext_arg:
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; GCN: s_load_dword [[B:s[0-9]+]]
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; GCN: v_cmp_ne_u32_e64 [[CMP:s\[[0-9]+:[0-9]+\]]], [[B]], -1{{$}}
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; GCN-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, [[CMP]]
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; GCN-NEXT: buffer_store_byte [[RESULT]]
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; GCN: s_endpgm
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define void @cmp_sext_k_neg1_i8_sext_arg(i1 addrspace(1)* %out, i8 signext %b) nounwind {
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%b.ext = sext i8 %b to i32
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%icmp0 = icmp ne i32 %b.ext, -1
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store i1 %icmp0, i1 addrspace(1)* %out
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ret void
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}
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; FIXME: This ends up doing a buffer_load_ubyte, and and compare to
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; 255. Seems to be because of ordering problems when not allowing load widths to be reduced.
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; Should do a buffer_load_sbyte and compare with -1
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; FUNC-LABEL: {{^}}cmp_sext_k_neg1_i8_arg:
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; SI: s_load_dword [[VAL:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0xb
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; VI: s_load_dword [[VAL:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x2c
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; GCN: s_movk_i32 [[K:s[0-9]+]], 0xff
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; GCN-DAG: s_and_b32 [[B:s[0-9]+]], [[VAL]], [[K]]
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; GCN-DAG: v_mov_b32_e32 [[VK:v[0-9]+]], [[K]]
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; GCN: v_cmp_ne_u32_e32 vcc, [[B]], [[VK]]{{$}}
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; GCN: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, vcc
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; GCN: buffer_store_byte [[RESULT]]
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; GCN: s_endpgm
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define void @cmp_sext_k_neg1_i8_arg(i1 addrspace(1)* %out, i8 %b) nounwind {
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%b.ext = sext i8 %b to i32
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%icmp0 = icmp ne i32 %b.ext, -1
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store i1 %icmp0, i1 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}cmp_zext_k_neg1:
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; GCN: v_mov_b32_e32 [[RESULT:v[0-9]+]], 1{{$}}
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; GCN: buffer_store_byte [[RESULT]]
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; GCN: s_endpgm
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define void @cmp_zext_k_neg1(i1 addrspace(1)* %out, i8 %b) nounwind {
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%b.ext = zext i8 %b to i32
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%icmp0 = icmp ne i32 %b.ext, -1
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store i1 %icmp0, i1 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}zext_bool_icmp_ne_k:
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; GCN: v_mov_b32_e32 [[RESULT:v[0-9]+]], 1{{$}}
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; GCN: buffer_store_byte [[RESULT]]
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; GCN-NEXT: s_endpgm
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define void @zext_bool_icmp_ne_k(i1 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
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%icmp0 = icmp ne i32 %a, %b
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%ext = zext i1 %icmp0 to i32
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%icmp1 = icmp ne i32 %ext, 2
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store i1 %icmp1, i1 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}zext_bool_icmp_eq_k:
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; GCN: v_mov_b32_e32 [[RESULT:v[0-9]+]], 0{{$}}
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; GCN: buffer_store_byte [[RESULT]]
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; GCN-NEXT: s_endpgm
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define void @zext_bool_icmp_eq_k(i1 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
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%icmp0 = icmp ne i32 %a, %b
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%ext = zext i1 %icmp0 to i32
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%icmp1 = icmp eq i32 %ext, 2
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store i1 %icmp1, i1 addrspace(1)* %out
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ret void
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}
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; FIXME: These cases should really be able fold to true/false in
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; DAGCombiner
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; This really folds away to false
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; FUNC-LABEL: {{^}}sext_bool_icmp_eq_1:
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; GCN: v_mov_b32_e32 [[K:v[0-9]+]], 0{{$}}
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; GCN: buffer_store_byte [[K]]
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define void @sext_bool_icmp_eq_1(i1 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
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%icmp0 = icmp eq i32 %a, %b
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%ext = sext i1 %icmp0 to i32
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%icmp1 = icmp eq i32 %ext, 1
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store i1 %icmp1, i1 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}sext_bool_icmp_ne_1:
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; GCN: v_mov_b32_e32 [[K:v[0-9]+]], 1{{$}}
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; GCN: buffer_store_byte [[K]]
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define void @sext_bool_icmp_ne_1(i1 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
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%icmp0 = icmp ne i32 %a, %b
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%ext = sext i1 %icmp0 to i32
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%icmp1 = icmp ne i32 %ext, 1
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store i1 %icmp1, i1 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}sext_bool_icmp_ne_k:
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; GCN: v_mov_b32_e32 [[K:v[0-9]+]], 1{{$}}
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; GCN: buffer_store_byte [[K]]
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define void @sext_bool_icmp_ne_k(i1 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
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%icmp0 = icmp ne i32 %a, %b
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%ext = sext i1 %icmp0 to i32
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%icmp1 = icmp ne i32 %ext, 2
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store i1 %icmp1, i1 addrspace(1)* %out
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ret void
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}
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