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3b391fe80e
Summary: Add isRenamable() predicate to MachineOperand. This predicate can be used by machine passes after register allocation to determine whether it is safe to rename a given register operand. Register operands that aren't marked as renamable may be required to be assigned their current register to satisfy constraints that are not captured by the machine IR (e.g. ABI or ISA constraints). Reviewers: qcolombet, MatzeB, hfinkel Subscribers: nemanjai, mcrosier, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D39400 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320503 91177308-0d34-0410-b5e6-96231b3b80d8
33 lines
935 B
YAML
33 lines
935 B
YAML
# RUN: llc -o - %s -mtriple=amdgcn--amdhsa -verify-machineinstrs -run-pass=greedy,virtregrewriter | FileCheck %s
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--- |
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define amdgpu_kernel void @func0() {
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ret void
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}
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...
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---
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# We should not detect any interference between v0/v1 here and only allocate
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# sgpr0-sgpr3.
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#
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# CHECK-LABEL: func0
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# CHECK: S_NOP 0, implicit-def renamable %sgpr0
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# CHECK: S_NOP 0, implicit-def renamable %sgpr3
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# CHECK: S_NOP 0, implicit-def renamable %sgpr1
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# CHECK: S_NOP 0, implicit-def renamable %sgpr2
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# CHECK: S_NOP 0, implicit renamable %sgpr0, implicit renamable %sgpr3
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# CHECK: S_NOP 0, implicit renamable %sgpr1, implicit renamable %sgpr2
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name: func0
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body: |
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bb.0:
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S_NOP 0, implicit-def undef %0.sub0 : sreg_128
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S_NOP 0, implicit-def %0.sub3
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S_NOP 0, implicit-def undef %1.sub1 : sreg_128
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S_NOP 0, implicit-def %1.sub2
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S_NOP 0, implicit %0.sub0, implicit %0.sub3
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S_NOP 0, implicit %1.sub1, implicit %1.sub2
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...
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