Francis Visoiu Mistrih e6b89910eb [CodeGen] Always use printReg to print registers in both MIR and debug ...

output

As part of the unification of the debug format and the MIR format,
always use `printReg` to print all kinds of registers.

Updated the tests using '_' instead of '%noreg' until we decide which
one we want to be the default one.

Differential Revision: https://reviews.llvm.org/D40421

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319445 91177308-0d34-0410-b5e6-96231b3b80d8

2017-11-30 16:12:24 +00:00

..

bundled-instructions.mir

[CodeGen] Always use printReg to print registers in both MIR and debug

2017-11-30 16:12:24 +00:00

cfi-same-value.mir

MIRParser: Use shorter cfi identifiers

2016-07-26 18:20:00 +00:00

expected-closing-brace.mir

llc: Add support for -run-pass none

2016-07-16 02:24:59 +00:00

extraneous-closing-brace-error.mir

llc: Add support for -run-pass none

2016-07-16 02:24:59 +00:00

ifcvt_canFallThroughTo.mir

[MIRPrinter] Print empty successor lists when they cannot be guessed

2017-09-19 23:34:12 +00:00

ifcvt_diamond_unanalyzable.mir

[CodeGen] Always use printReg to print registers in both MIR and debug

2017-11-30 16:12:24 +00:00

ifcvt_forked_diamond_unanalyzable.mir

[CodeGen] Always use printReg to print registers in both MIR and debug

2017-11-30 16:12:24 +00:00

ifcvt_simple_bad_zero_prob_succ.mir

[IfConversion] Add testcases [NFC]

2017-09-20 08:23:29 +00:00

ifcvt_simple_unanalyzable.mir

[CodeGen] Always use printReg to print registers in both MIR and debug

2017-11-30 16:12:24 +00:00

ifcvt_triangleWoCvtToNextEdge.mir

[CodeGen] Always use printReg to print registers in both MIR and debug

2017-11-30 16:12:24 +00:00

lit.local.cfg

…

nested-instruction-bundle-error.mir

llc: Add support for -run-pass none

2016-07-16 02:24:59 +00:00

PR32721_ifcvt_triangle_unanalyzable.mir

[IfConversion] Add testcases [NFC]

2017-09-20 08:23:29 +00:00

target-constant-pools-error.mir

[MIR] Print target-specific constant pools

2017-08-02 11:09:30 +00:00