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aca5381bd1
The work order was changed in r228186 from SCC order to RPO with an arbitrary sorting function. The sorting function attempted to move inner loop nodes earlier. This was was apparently relying on an assumption that every block in a given loop / the same loop depth would be seen before visiting another loop. In the broken testcase, a block outside of the loop was encountered before moving onto another block in the same loop. The testcase would then structurize such that one blocks unconditional successor could never be reached. Revert to plain RPO for the analysis phase. This fixes detecting edges as backedges that aren't really. The processing phase does use another visited set, and I'm unclear on whether the order there is as important. An arbitrary order doesn't work, and triggers some infinite loops. The reversed RPO list seems to work and is closer to the order that was used before, minus the arbitary custom sorting. A few of the changed tests now produce smaller code, and a few are slightly worse looking. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321751 91177308-0d34-0410-b5e6-96231b3b80d8
98 lines
4.9 KiB
LLVM
98 lines
4.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -structurizecfg %s -o - | FileCheck %s
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define void @main(float addrspace(1)* %out) {
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; CHECK-LABEL: @main(
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; CHECK-NEXT: main_body:
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; CHECK-NEXT: br label [[LOOP_OUTER:%.*]]
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; CHECK: LOOP.outer:
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; CHECK-NEXT: [[TEMP8_0_PH:%.*]] = phi float [ 0.000000e+00, [[MAIN_BODY:%.*]] ], [ [[TMP13:%.*]], [[FLOW3:%.*]] ]
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; CHECK-NEXT: [[TEMP4_0_PH:%.*]] = phi i32 [ 0, [[MAIN_BODY]] ], [ [[TMP12:%.*]], [[FLOW3]] ]
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: LOOP:
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; CHECK-NEXT: [[TMP0:%.*]] = phi i32 [ undef, [[LOOP_OUTER]] ], [ [[TMP12]], [[FLOW:%.*]] ]
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; CHECK-NEXT: [[TMP1:%.*]] = phi float [ undef, [[LOOP_OUTER]] ], [ [[TMP13]], [[FLOW]] ]
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; CHECK-NEXT: [[TEMP4_0:%.*]] = phi i32 [ [[TEMP4_0_PH]], [[LOOP_OUTER]] ], [ [[TMP15:%.*]], [[FLOW]] ]
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; CHECK-NEXT: [[TMP20:%.*]] = add i32 [[TEMP4_0]], 1
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; CHECK-NEXT: [[TMP22:%.*]] = icmp sgt i32 [[TMP20]], 3
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; CHECK-NEXT: [[TMP2:%.*]] = xor i1 [[TMP22]], true
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; CHECK-NEXT: br i1 [[TMP2]], label [[ENDIF:%.*]], label [[FLOW]]
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; CHECK: Flow2:
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; CHECK-NEXT: [[TMP3:%.*]] = phi float [ [[TEMP8_0_PH]], [[IF29:%.*]] ], [ [[TMP9:%.*]], [[FLOW1:%.*]] ]
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; CHECK-NEXT: [[TMP4:%.*]] = phi i32 [ [[TMP20]], [[IF29]] ], [ undef, [[FLOW1]] ]
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; CHECK-NEXT: [[TMP5:%.*]] = phi i1 [ [[TMP32:%.*]], [[IF29]] ], [ true, [[FLOW1]] ]
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; CHECK-NEXT: br label [[FLOW]]
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; CHECK: Flow3:
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; CHECK-NEXT: br i1 [[TMP16:%.*]], label [[ENDLOOP:%.*]], label [[LOOP_OUTER]]
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; CHECK: ENDLOOP:
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; CHECK-NEXT: [[TEMP8_1:%.*]] = phi float [ [[TMP14:%.*]], [[FLOW3]] ]
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; CHECK-NEXT: [[TMP23:%.*]] = icmp eq i32 [[TMP20]], 3
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; CHECK-NEXT: [[DOT45:%.*]] = select i1 [[TMP23]], float 0.000000e+00, float 1.000000e+00
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; CHECK-NEXT: store float [[DOT45]], float addrspace(1)* [[OUT:%.*]]
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; CHECK-NEXT: ret void
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; CHECK: ENDIF:
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; CHECK-NEXT: [[TMP31:%.*]] = icmp sgt i32 [[TMP20]], 1
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; CHECK-NEXT: [[TMP6:%.*]] = xor i1 [[TMP31]], true
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; CHECK-NEXT: br i1 [[TMP6]], label [[ENDIF28:%.*]], label [[FLOW1]]
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; CHECK: Flow1:
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; CHECK-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP20]], [[ENDIF28]] ], [ [[TMP0]], [[ENDIF]] ]
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; CHECK-NEXT: [[TMP8:%.*]] = phi float [ [[TMP35:%.*]], [[ENDIF28]] ], [ [[TMP1]], [[ENDIF]] ]
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; CHECK-NEXT: [[TMP9]] = phi float [ [[TMP35]], [[ENDIF28]] ], [ [[TEMP8_0_PH]], [[ENDIF]] ]
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; CHECK-NEXT: [[TMP10:%.*]] = phi i1 [ [[TMP36:%.*]], [[ENDIF28]] ], [ true, [[ENDIF]] ]
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; CHECK-NEXT: [[TMP11:%.*]] = phi i1 [ false, [[ENDIF28]] ], [ true, [[ENDIF]] ]
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; CHECK-NEXT: br i1 [[TMP11]], label [[IF29]], label [[FLOW2:%.*]]
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; CHECK: IF29:
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; CHECK-NEXT: [[TMP32]] = icmp sgt i32 [[TMP20]], 2
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; CHECK-NEXT: br label [[FLOW2]]
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; CHECK: Flow:
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; CHECK-NEXT: [[TMP12]] = phi i32 [ [[TMP7]], [[FLOW2]] ], [ [[TMP0]], [[LOOP]] ]
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; CHECK-NEXT: [[TMP13]] = phi float [ [[TMP8]], [[FLOW2]] ], [ [[TMP1]], [[LOOP]] ]
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; CHECK-NEXT: [[TMP14]] = phi float [ [[TMP3]], [[FLOW2]] ], [ [[TEMP8_0_PH]], [[LOOP]] ]
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; CHECK-NEXT: [[TMP15]] = phi i32 [ [[TMP4]], [[FLOW2]] ], [ undef, [[LOOP]] ]
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; CHECK-NEXT: [[TMP16]] = phi i1 [ [[TMP10]], [[FLOW2]] ], [ true, [[LOOP]] ]
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; CHECK-NEXT: [[TMP17:%.*]] = phi i1 [ [[TMP5]], [[FLOW2]] ], [ true, [[LOOP]] ]
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; CHECK-NEXT: br i1 [[TMP17]], label [[FLOW3]], label [[LOOP]]
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; CHECK: ENDIF28:
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; CHECK-NEXT: [[TMP35]] = fadd float [[TEMP8_0_PH]], 1.000000e+00
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; CHECK-NEXT: [[TMP36]] = icmp sgt i32 [[TMP20]], 2
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; CHECK-NEXT: br label [[FLOW1]]
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;
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main_body:
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br label %LOOP.outer
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LOOP.outer: ; preds = %ENDIF28, %main_body
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%temp8.0.ph = phi float [ 0.000000e+00, %main_body ], [ %tmp35, %ENDIF28 ]
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%temp4.0.ph = phi i32 [ 0, %main_body ], [ %tmp20, %ENDIF28 ]
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br label %LOOP
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LOOP: ; preds = %IF29, %LOOP.outer
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%temp4.0 = phi i32 [ %temp4.0.ph, %LOOP.outer ], [ %tmp20, %IF29 ]
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%tmp20 = add i32 %temp4.0, 1
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%tmp22 = icmp sgt i32 %tmp20, 3
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br i1 %tmp22, label %ENDLOOP, label %ENDIF
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ENDLOOP: ; preds = %ENDIF28, %IF29, %LOOP
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%temp8.1 = phi float [ %temp8.0.ph, %LOOP ], [ %temp8.0.ph, %IF29 ], [ %tmp35, %ENDIF28 ]
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%tmp23 = icmp eq i32 %tmp20, 3
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%.45 = select i1 %tmp23, float 0.000000e+00, float 1.000000e+00
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store float %.45, float addrspace(1)* %out
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ret void
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ENDIF: ; preds = %LOOP
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%tmp31 = icmp sgt i32 %tmp20, 1
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br i1 %tmp31, label %IF29, label %ENDIF28
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IF29: ; preds = %ENDIF
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%tmp32 = icmp sgt i32 %tmp20, 2
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br i1 %tmp32, label %ENDLOOP, label %LOOP
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ENDIF28: ; preds = %ENDIF
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%tmp35 = fadd float %temp8.0.ph, 1.0
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%tmp36 = icmp sgt i32 %tmp20, 2
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br i1 %tmp36, label %ENDLOOP, label %LOOP.outer
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}
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attributes #0 = { "enable-no-nans-fp-math"="true" "unsafe-fp-math"="true" }
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attributes #1 = { nounwind readnone }
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attributes #2 = { readnone }
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