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IMHO it is an antipattern to have a enum value that is Default. At any given piece of code it is not clear if we have to handle Default or if has already been mapped to a concrete value. In this case in particular, only the target can do the mapping and it is nice to make sure it is always done. This deletes the two default enum values of CodeModel and uses an explicit Optional<CodeModel> when it is possible that it is unspecified. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309911 91177308-0d34-0410-b5e6-96231b3b80d8
147 lines
4.8 KiB
C++
147 lines
4.8 KiB
C++
//===-- XCoreMCTargetDesc.cpp - XCore Target Descriptions -----------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides XCore specific target descriptions.
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//
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/XCoreMCTargetDesc.h"
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#include "InstPrinter/XCoreInstPrinter.h"
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#include "MCTargetDesc/XCoreMCAsmInfo.h"
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#include "XCoreTargetStreamer.h"
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#include "llvm/ADT/StringRef.h"
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#include "llvm/MC/MCDwarf.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/Support/CodeGen.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/FormattedStream.h"
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#include "llvm/Support/TargetRegistry.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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#define GET_INSTRINFO_MC_DESC
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#include "XCoreGenInstrInfo.inc"
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#define GET_SUBTARGETINFO_MC_DESC
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#include "XCoreGenSubtargetInfo.inc"
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#define GET_REGINFO_MC_DESC
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#include "XCoreGenRegisterInfo.inc"
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static MCInstrInfo *createXCoreMCInstrInfo() {
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MCInstrInfo *X = new MCInstrInfo();
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InitXCoreMCInstrInfo(X);
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return X;
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}
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static MCRegisterInfo *createXCoreMCRegisterInfo(const Triple &TT) {
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MCRegisterInfo *X = new MCRegisterInfo();
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InitXCoreMCRegisterInfo(X, XCore::LR);
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return X;
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}
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static MCSubtargetInfo *
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createXCoreMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) {
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return createXCoreMCSubtargetInfoImpl(TT, CPU, FS);
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}
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static MCAsmInfo *createXCoreMCAsmInfo(const MCRegisterInfo &MRI,
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const Triple &TT) {
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MCAsmInfo *MAI = new XCoreMCAsmInfo(TT);
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// Initial state of the frame pointer is SP.
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MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, XCore::SP, 0);
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MAI->addInitialFrameState(Inst);
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return MAI;
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}
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static MCInstPrinter *createXCoreMCInstPrinter(const Triple &T,
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unsigned SyntaxVariant,
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const MCAsmInfo &MAI,
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const MCInstrInfo &MII,
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const MCRegisterInfo &MRI) {
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return new XCoreInstPrinter(MAI, MII, MRI);
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}
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XCoreTargetStreamer::XCoreTargetStreamer(MCStreamer &S) : MCTargetStreamer(S) {}
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XCoreTargetStreamer::~XCoreTargetStreamer() = default;
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namespace {
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class XCoreTargetAsmStreamer : public XCoreTargetStreamer {
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formatted_raw_ostream &OS;
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public:
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XCoreTargetAsmStreamer(MCStreamer &S, formatted_raw_ostream &OS);
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void emitCCTopData(StringRef Name) override;
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void emitCCTopFunction(StringRef Name) override;
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void emitCCBottomData(StringRef Name) override;
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void emitCCBottomFunction(StringRef Name) override;
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};
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} // end anonymous namespace
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XCoreTargetAsmStreamer::XCoreTargetAsmStreamer(MCStreamer &S,
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formatted_raw_ostream &OS)
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: XCoreTargetStreamer(S), OS(OS) {}
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void XCoreTargetAsmStreamer::emitCCTopData(StringRef Name) {
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OS << "\t.cc_top " << Name << ".data," << Name << '\n';
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}
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void XCoreTargetAsmStreamer::emitCCTopFunction(StringRef Name) {
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OS << "\t.cc_top " << Name << ".function," << Name << '\n';
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}
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void XCoreTargetAsmStreamer::emitCCBottomData(StringRef Name) {
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OS << "\t.cc_bottom " << Name << ".data\n";
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}
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void XCoreTargetAsmStreamer::emitCCBottomFunction(StringRef Name) {
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OS << "\t.cc_bottom " << Name << ".function\n";
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}
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static MCTargetStreamer *createTargetAsmStreamer(MCStreamer &S,
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formatted_raw_ostream &OS,
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MCInstPrinter *InstPrint,
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bool isVerboseAsm) {
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return new XCoreTargetAsmStreamer(S, OS);
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}
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// Force static initialization.
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extern "C" void LLVMInitializeXCoreTargetMC() {
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// Register the MC asm info.
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RegisterMCAsmInfoFn X(getTheXCoreTarget(), createXCoreMCAsmInfo);
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// Register the MC instruction info.
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TargetRegistry::RegisterMCInstrInfo(getTheXCoreTarget(),
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createXCoreMCInstrInfo);
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// Register the MC register info.
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TargetRegistry::RegisterMCRegInfo(getTheXCoreTarget(),
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createXCoreMCRegisterInfo);
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// Register the MC subtarget info.
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TargetRegistry::RegisterMCSubtargetInfo(getTheXCoreTarget(),
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createXCoreMCSubtargetInfo);
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// Register the MCInstPrinter
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TargetRegistry::RegisterMCInstPrinter(getTheXCoreTarget(),
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createXCoreMCInstPrinter);
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TargetRegistry::RegisterAsmTargetStreamer(getTheXCoreTarget(),
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createTargetAsmStreamer);
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}
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