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Files

Bjorn Pettersson 4cbab70b62 [MIRPrinter] Use %subreg.xxx syntax for subregister index operands

Summary:
Print %subreg.<subregidxname> instead of just the subregister
index when printing immediate operands corresponding to subreg
indices in INSERT_SUBREG, EXTRACT_SUBREG, SUBREG_TO_REG and
REG_SEQUENCE.

Reviewers: qcolombet, MatzeB

Reviewed By: MatzeB

Subscribers: nhaehnle, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D39696

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317513 91177308-0d34-0410-b5e6-96231b3b80d8

2017-11-06 21:46:06 +00:00

AArch64

[AsmPrinterDwarf] Add support for .cfi_restore directive

2017-11-02 12:00:58 +00:00

AMDGPU

MIR: Print the register class or bank in vreg defs

2017-10-24 18:04:54 +00:00

ARM

[IfConversion] Add testcases [NFC]

2017-09-20 08:23:29 +00:00

Generic

[RegAllocFast] Add the proper initialize method to use the .mir infrastructure

2017-07-07 19:25:42 +00:00

Hexagon

[Hexagon] Handle Hexagon-specific machine operand target flags in MIR

2017-07-10 18:31:02 +00:00

Mips

MIRParser: Use shorter cfi identifiers

2016-07-26 18:20:00 +00:00

NVPTX

MIR: Print the register class or bank in vreg defs

2017-10-24 18:04:54 +00:00

PowerPC

MIRParser/MIRPrinter: Compute isSSA instead of printing/parsing it.

2016-08-24 01:32:41 +00:00

X86

[MIRPrinter] Use %subreg.xxx syntax for subregister index operands

2017-11-06 21:46:06 +00:00

README

Add README describing the intention of test/CodeGen/MIR

2016-12-09 20:16:12 +00:00

README

This directory contains tests for the MIR file format parser and printer. It
was necessary to split the tests across different targets as no single target
covers all features available in machine IR.

Tests for codegen passes should NOT be here but in test/CodeGen/sometarget. As
a rule of thumb this directory should only contain tests using
'llc -run-pass none'.