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559fb26604
In the past while, I've committed a number of patches in the PowerPC back end aimed at eliminating comparison instructions. However, this causes some failures in proprietary source and these issues are not observed in SPEC or any open source packages I've been able to run. As a result, I'm pulling the entire series and will refactor it to: - Have a single entry point for easy control - Have fine-grained control over which patterns we transform A side-effect of this is that test cases for these patches (and modified by them) are XFAIL-ed. This is a temporary measure as it is counter-productive to remove/modify these test cases and then have to modify them again when the refactored patch is recommitted. The failure will be investigated in parallel to the refactoring effort and the recommit will either have a fix for it or will leave this transformation off by default until the problem is resolved. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314244 91177308-0d34-0410-b5e6-96231b3b80d8
58 lines
2.4 KiB
LLVM
58 lines
2.4 KiB
LLVM
; XFAIL: *
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; The purpose of the test case is to ensure that a spill that happens during
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; intermediate calculations for a comparison performed in a GPR spills the
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; full register. Some i32 comparisons performed in GPRs use code that uses
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; the full 64-bits of the register in intermediate stages. Spilling such a value
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; as a 32-bit value is incorrect.
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
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; RUN: -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
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; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
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; RUN: -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
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; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
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@glob = common local_unnamed_addr global i64 0, align 8
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@.str = private unnamed_addr constant [12 x i8] c"Value = %d\0A\00", align 1
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; Function Attrs: noinline nounwind
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define void @call(i64 %a) local_unnamed_addr #0 {
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entry:
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store i64 %a, i64* @glob, align 8
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tail call void asm sideeffect "#Do Nothing", "~{memory}"()
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ret void
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}
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; Function Attrs: noinline nounwind
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define signext i32 @test(i32 signext %a, i32 signext %b, i32 signext %c) local_unnamed_addr #0 {
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entry:
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%add = add nsw i32 %b, %a
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%sub = sub nsw i32 %add, %c
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%conv = sext i32 %sub to i64
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tail call void @call(i64 %conv)
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tail call void asm sideeffect "#Do Nothing", "~{r0},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{r16},~{r17},~{r18},~{r19},~{r20},~{r21},~{r22},~{r23},~{r24},~{r25},~{r26},~{r27},~{r28},~{r29},~{r30},~{r31}"()
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%cmp = icmp sle i32 %add, %c
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%conv1 = zext i1 %cmp to i32
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ret i32 %conv1
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; CHECK-LABEL: test
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; CHECK: subf r3,
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; CHECK: extsw r3,
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; CHECK: bl call
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; CHECK: sub r3,
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; CHECK: rldicl r3, r3, 1, 63
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; CHECK: std r3, [[OFF:[0-9]+]](r1)
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; CHECK: #APP
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; CHECK: ld r3, [[OFF]](r1)
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; CHECK: xori r3, r3, 1
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; CHECK: blr
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}
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; Function Attrs: nounwind
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define signext i32 @main() local_unnamed_addr #1 {
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entry:
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%call = tail call signext i32 @test(i32 signext 10, i32 signext -15, i32 signext 0)
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%call1 = tail call signext i32 (i8*, ...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 signext %call)
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ret i32 0
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}
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; Function Attrs: nounwind
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declare signext i32 @printf(i8* nocapture readonly, ...) local_unnamed_addr #2
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