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559fb26604
In the past while, I've committed a number of patches in the PowerPC back end aimed at eliminating comparison instructions. However, this causes some failures in proprietary source and these issues are not observed in SPEC or any open source packages I've been able to run. As a result, I'm pulling the entire series and will refactor it to: - Have a single entry point for easy control - Have fine-grained control over which patterns we transform A side-effect of this is that test cases for these patches (and modified by them) are XFAIL-ed. This is a temporary measure as it is counter-productive to remove/modify these test cases and then have to modify them again when the refactored patch is recommitted. The failure will be investigated in parallel to the refactoring effort and the recommit will either have a fix for it or will leave this transformation off by default until the problem is resolved. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314244 91177308-0d34-0410-b5e6-96231b3b80d8
87 lines
2.6 KiB
LLVM
87 lines
2.6 KiB
LLVM
; XFAIL: *
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
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; RUN: -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
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; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
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; RUN: -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
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; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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@glob = common local_unnamed_addr global i32 0, align 4
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; Function Attrs: norecurse nounwind readnone
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define signext i32 @test_iltsi(i32 signext %a, i32 signext %b) {
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; CHECK-LABEL: test_iltsi:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: sub [[REG:r[0-9]+]], r3, r4
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; CHECK-NEXT: rldicl r3, [[REG]], 1, 63
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp slt i32 %a, %b
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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}
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; Function Attrs: norecurse nounwind readnone
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define signext i32 @test_iltsi_sext(i32 signext %a, i32 signext %b) {
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; CHECK-LABEL: test_iltsi_sext:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: sub [[REG:r[0-9]+]], r3, r4
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; CHECK-NEXT: sradi r3, [[REG]], 63
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp slt i32 %a, %b
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%sub = sext i1 %cmp to i32
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ret i32 %sub
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}
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; Function Attrs: norecurse nounwind readnone
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define signext i32 @test_iltsi_sext_z(i32 signext %a) {
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; CHECK-LABEL: test_iltsi_sext_z:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: srawi r3, r3, 31
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp slt i32 %a, 0
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%sub = sext i1 %cmp to i32
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ret i32 %sub
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}
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; Function Attrs: norecurse nounwind
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define void @test_iltsi_store(i32 signext %a, i32 signext %b) {
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; CHECK-LABEL: test_iltsi_store:
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; CHECK: # BB#0: # %entry
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; CHECK: sub [[REG:r[0-9]+]], r3, r4
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; CHECK: rldicl {{r[0-9]+}}, [[REG]], 1, 63
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entry:
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%cmp = icmp slt i32 %a, %b
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%conv = zext i1 %cmp to i32
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store i32 %conv, i32* @glob, align 4
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ret void
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}
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; Function Attrs: norecurse nounwind
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define void @test_iltsi_sext_store(i32 signext %a, i32 signext %b) {
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; CHECK-LABEL: test_iltsi_sext_store:
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; CHECK: # BB#0: # %entry
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; CHECK: sub [[REG:r[0-9]+]], r3, r4
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; CHECK: sradi {{r[0-9]+}}, [[REG]], 63
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entry:
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%cmp = icmp slt i32 %a, %b
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%sub = sext i1 %cmp to i32
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store i32 %sub, i32* @glob, align 4
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ret void
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}
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; Function Attrs: norecurse nounwind
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define void @test_iltsi_sext_z_store(i32 signext %a) {
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; CHECK-LABEL: test_iltsi_sext_z_store:
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; CHECK: srawi {{r[0-9]+}}, r3, 31
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; CHECK: blr
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entry:
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%cmp = icmp slt i32 %a, 0
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%sub = sext i1 %cmp to i32
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store i32 %sub, i32* @glob, align 4
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ret void
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}
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