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8ab242ce95
This patch series adds support for the IBM z14 processor. This part includes: - Basic support for the new processor and its features. - Support for new instructions (except vector 32-bit float and 128-bit float). - CodeGen for new instructions, including new LLVM intrinsics. - Scheduler description for the new processor. - Detection of z14 as host processor. Support for the new 32-bit vector float and 128-bit vector float instructions is provided by separate patches. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308194 91177308-0d34-0410-b5e6-96231b3b80d8
25 lines
616 B
LLVM
25 lines
616 B
LLVM
; Test insertions of memory values into 0 on z14.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
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; Test VLLEZLF.
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define <4 x i32> @f1(i32 *%ptr) {
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; CHECK-LABEL: f1:
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; CHECK: vllezlf %v24, 0(%r2)
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; CHECK: br %r14
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%val = load i32, i32 *%ptr
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%ret = insertelement <4 x i32> zeroinitializer, i32 %val, i32 0
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ret <4 x i32> %ret
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}
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; Test VLLEZLF with a float.
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define <4 x float> @f2(float *%ptr) {
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; CHECK-LABEL: f2:
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; CHECK: vllezlf %v24, 0(%r2)
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; CHECK: br %r14
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%val = load float, float *%ptr
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%ret = insertelement <4 x float> zeroinitializer, float %val, i32 0
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ret <4 x float> %ret
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}
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