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https://github.com/RPCS3/llvm.git
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4e3a697007
This moves all the bmi2 specific intrinsics to a separate test file and adds a bmi1 only command line to the existing bmi test. This will allow us to see the missed opportunity to use bextr to handle 64-bit 'and' with a large mask. This will be improved in an upcoming patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309700 91177308-0d34-0410-b5e6-96231b3b80d8
100 lines
2.5 KiB
LLVM
100 lines
2.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2 | FileCheck %s
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define i32 @bzhi32(i32 %x, i32 %y) {
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; CHECK-LABEL: bzhi32:
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; CHECK: # BB#0:
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; CHECK-NEXT: bzhil %esi, %edi, %eax
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; CHECK-NEXT: retq
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%tmp = tail call i32 @llvm.x86.bmi.bzhi.32(i32 %x, i32 %y)
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ret i32 %tmp
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}
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define i32 @bzhi32_load(i32* %x, i32 %y) {
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; CHECK-LABEL: bzhi32_load:
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; CHECK: # BB#0:
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; CHECK-NEXT: bzhil %esi, (%rdi), %eax
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; CHECK-NEXT: retq
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%x1 = load i32, i32* %x
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%tmp = tail call i32 @llvm.x86.bmi.bzhi.32(i32 %x1, i32 %y)
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ret i32 %tmp
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}
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declare i32 @llvm.x86.bmi.bzhi.32(i32, i32)
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define i64 @bzhi64(i64 %x, i64 %y) {
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; CHECK-LABEL: bzhi64:
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; CHECK: # BB#0:
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; CHECK-NEXT: bzhiq %rsi, %rdi, %rax
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; CHECK-NEXT: retq
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%tmp = tail call i64 @llvm.x86.bmi.bzhi.64(i64 %x, i64 %y)
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ret i64 %tmp
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}
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declare i64 @llvm.x86.bmi.bzhi.64(i64, i64)
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define i32 @pdep32(i32 %x, i32 %y) {
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; CHECK-LABEL: pdep32:
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; CHECK: # BB#0:
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; CHECK-NEXT: pdepl %esi, %edi, %eax
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; CHECK-NEXT: retq
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%tmp = tail call i32 @llvm.x86.bmi.pdep.32(i32 %x, i32 %y)
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ret i32 %tmp
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}
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define i32 @pdep32_load(i32 %x, i32* %y) {
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; CHECK-LABEL: pdep32_load:
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; CHECK: # BB#0:
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; CHECK-NEXT: pdepl (%rsi), %edi, %eax
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; CHECK-NEXT: retq
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%y1 = load i32, i32* %y
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%tmp = tail call i32 @llvm.x86.bmi.pdep.32(i32 %x, i32 %y1)
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ret i32 %tmp
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}
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declare i32 @llvm.x86.bmi.pdep.32(i32, i32)
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define i64 @pdep64(i64 %x, i64 %y) {
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; CHECK-LABEL: pdep64:
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; CHECK: # BB#0:
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; CHECK-NEXT: pdepq %rsi, %rdi, %rax
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; CHECK-NEXT: retq
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%tmp = tail call i64 @llvm.x86.bmi.pdep.64(i64 %x, i64 %y)
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ret i64 %tmp
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}
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declare i64 @llvm.x86.bmi.pdep.64(i64, i64)
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define i32 @pext32(i32 %x, i32 %y) {
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; CHECK-LABEL: pext32:
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; CHECK: # BB#0:
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; CHECK-NEXT: pextl %esi, %edi, %eax
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; CHECK-NEXT: retq
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%tmp = tail call i32 @llvm.x86.bmi.pext.32(i32 %x, i32 %y)
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ret i32 %tmp
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}
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define i32 @pext32_load(i32 %x, i32* %y) {
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; CHECK-LABEL: pext32_load:
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; CHECK: # BB#0:
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; CHECK-NEXT: pextl (%rsi), %edi, %eax
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; CHECK-NEXT: retq
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%y1 = load i32, i32* %y
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%tmp = tail call i32 @llvm.x86.bmi.pext.32(i32 %x, i32 %y1)
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ret i32 %tmp
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}
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declare i32 @llvm.x86.bmi.pext.32(i32, i32)
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define i64 @pext64(i64 %x, i64 %y) {
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; CHECK-LABEL: pext64:
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; CHECK: # BB#0:
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; CHECK-NEXT: pextq %rsi, %rdi, %rax
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; CHECK-NEXT: retq
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%tmp = tail call i64 @llvm.x86.bmi.pext.64(i64 %x, i64 %y)
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ret i64 %tmp
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}
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declare i64 @llvm.x86.bmi.pext.64(i64, i64)
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