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a533d6cc52
Add the missing domain equivalences for movss, movsd, movd and movq zero extending loading instructions. Differential Revision: https://reviews.llvm.org/D27684 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289825 91177308-0d34-0410-b5e6-96231b3b80d8
13 lines
451 B
LLVM
13 lines
451 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse2 | FileCheck %s
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define <4 x i32> @t(i32 %x, i32 %y) nounwind {
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; CHECK-LABEL: t:
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; CHECK: # BB#0:
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; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; CHECK-NEXT: retl
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%tmp1 = insertelement <4 x i32> zeroinitializer, i32 %x, i32 0
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%tmp2 = insertelement <4 x i32> %tmp1, i32 %y, i32 1
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ret <4 x i32> %tmp2
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}
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