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565cfe059c
In testing, we've found yet another miscompile caused by the new tables. And this one is even less clear how to fix (we could teach it to fold a 16-bit load instead of the 32-bit load it wants, or block folding entirely). Also, the approach to excluding instructions seems increasingly to not scale well. I have left a more detailed analysis on the review log for the original patch (https://reviews.llvm.org/D32684) along with suggested path forward. I will land an additional test case that I wrote which covers the code that was miscompiling (folding into the output of `pextrw`) in a subsequent commit to keep this a pure revert. For each commit reverted here, I've restricted the revert to the non-test code touching the x86 fold table emission until the last commit where I did revert the test updates. This means the *new* test cases added for `insertps` and `xchg` remain untouched (and continue to pass). Reverted commits: r304540: [X86] Don't fold into memory operands into insertps in the ... r304347: [TableGen] Adapt more places to getValueAsString now ... r304163: [X86] Don't fold away the memory operand of an xchg. r304123: Don't capture a temporary std::string in a StringRef. r304122: Resubmit "[X86] Adding new LLVM TableGen backend that ..." Original commit was in r304088, and after a string of fixes was reverted previously in r304121 to fix build bots, and then re-landed in r304122. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304762 91177308-0d34-0410-b5e6-96231b3b80d8
63 lines
2.8 KiB
LLVM
63 lines
2.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
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; Function Attrs: nounwind readonly uwtable
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define <2 x double> @sqrtd2(double* nocapture readonly %v) local_unnamed_addr #0 {
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; CHECK-LABEL: sqrtd2:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: vsqrtsd (%rdi), %xmm0, %xmm0
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; CHECK-NEXT: vsqrtsd 8(%rdi), %xmm1, %xmm1
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; CHECK-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; CHECK-NEXT: retq
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entry:
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%0 = load double, double* %v, align 8
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%call = tail call double @sqrt(double %0) #2
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%arrayidx1 = getelementptr inbounds double, double* %v, i64 1
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%1 = load double, double* %arrayidx1, align 8
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%call2 = tail call double @sqrt(double %1) #2
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%vecinit.i = insertelement <2 x double> undef, double %call, i32 0
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%vecinit1.i = insertelement <2 x double> %vecinit.i, double %call2, i32 1
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ret <2 x double> %vecinit1.i
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}
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; Function Attrs: nounwind readnone
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declare double @sqrt(double) local_unnamed_addr #1
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; Function Attrs: nounwind readonly uwtable
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define <4 x float> @sqrtf4(float* nocapture readonly %v) local_unnamed_addr #0 {
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; CHECK-LABEL: sqrtf4:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: vsqrtss (%rdi), %xmm0, %xmm0
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; CHECK-NEXT: vsqrtss 4(%rdi), %xmm1, %xmm1
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; CHECK-NEXT: vsqrtss 8(%rdi), %xmm2, %xmm2
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; CHECK-NEXT: vsqrtss 12(%rdi), %xmm3, %xmm3
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; CHECK-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3]
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; CHECK-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm2[0],xmm0[3]
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; CHECK-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm3[0]
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; CHECK-NEXT: retq
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entry:
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%0 = load float, float* %v, align 4
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%call = tail call float @sqrtf(float %0) #2
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%arrayidx1 = getelementptr inbounds float, float* %v, i64 1
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%1 = load float, float* %arrayidx1, align 4
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%call2 = tail call float @sqrtf(float %1) #2
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%arrayidx3 = getelementptr inbounds float, float* %v, i64 2
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%2 = load float, float* %arrayidx3, align 4
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%call4 = tail call float @sqrtf(float %2) #2
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%arrayidx5 = getelementptr inbounds float, float* %v, i64 3
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%3 = load float, float* %arrayidx5, align 4
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%call6 = tail call float @sqrtf(float %3) #2
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%vecinit.i = insertelement <4 x float> undef, float %call, i32 0
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%vecinit1.i = insertelement <4 x float> %vecinit.i, float %call2, i32 1
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%vecinit2.i = insertelement <4 x float> %vecinit1.i, float %call4, i32 2
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%vecinit3.i = insertelement <4 x float> %vecinit2.i, float %call6, i32 3
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ret <4 x float> %vecinit3.i
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}
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; Function Attrs: nounwind readnone
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declare float @sqrtf(float) local_unnamed_addr #1
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attributes #0 = { nounwind readonly uwtable "target-features"="+avx" "unsafe-fp-math"="false" "use-soft-float"="false" }
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attributes #1 = { nounwind readnone "target-features"="+avx2" "unsafe-fp-math"="false" "use-soft-float"="false" }
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attributes #2 = { nounwind readnone }
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