Sam Parker b74b51461d [ARM] WLS/LE Code Generation ...

Backend changes to enable WLS/LE low-overhead loops for armv8.1-m:
1) Use TTI to communicate to the HardwareLoop pass that we should try
   to generate intrinsics that guard the loop entry, as well as setting
   the loop trip count.
2) Lower the BRCOND that uses said intrinsic to an Arm specific node:
   ARMWLS.
3) ISelDAGToDAG the node to a new pseudo instruction:
   t2WhileLoopStart.
4) Add support in ArmLowOverheadLoops to handle the new pseudo
   instruction.

Differential Revision: https://reviews.llvm.org/D63816


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364733 91177308-0d34-0410-b5e6-96231b3b80d8

2019-07-01 08:21:28 +00:00

..

calls-codegen.ll

[ARM] Move low overhead loop codegen tests into a separate file. NFC

2019-06-27 16:56:41 +00:00

calls.ll

[ARM] Move low overhead loop codegen tests into a separate file. NFC

2019-06-27 16:56:41 +00:00

counter.ll

Revert rL363156.

2019-06-12 15:28:00 +00:00

do-rem.ll

[ARM] WLS/LE Code Generation

2019-07-01 08:21:28 +00:00

fp-emulation.ll

[ARM] WLS/LE Code Generation

2019-07-01 08:21:28 +00:00

lit.local.cfg

[lit] Delete empty lines at the end of lit.local.cfg NFC

2019-06-17 09:51:07 +00:00

simple-do.ll

[ARM] WLS/LE Code Generation

2019-07-01 08:21:28 +00:00

structure.ll

[ARM] WLS/LE Code Generation

2019-07-01 08:21:28 +00:00