Krzysztof Parzyszek 0d5de60cbe [RegisterCoalescer] Ensure that both registers have subranges if one does ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339792 91177308-0d34-0410-b5e6-96231b3b80d8

2018-08-15 17:04:58 +00:00

..

AArch64

[GlobalISel][IRTranslator] Fix a bug in handling repeating struct types during argument lowering.

2018-08-14 12:04:25 +00:00

AMDGPU

[CodeGen] Fix assert in SelectionDAG::computeKnownBits

2018-08-13 18:44:21 +00:00

ARC

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ARM

[ARM] TypeSize lower bound for ARMCodeGenPrepare

2018-08-15 13:29:50 +00:00

AVR

[AVR] Set trackLivenessAfterRegAlloc

2018-06-11 14:46:48 +00:00

BPF

bpf: add missing RegState to notify MachineInstr verifier necessary register usage

2018-07-27 16:58:52 +00:00

Generic

[DWARF] Unclamp line table version on Darwin for v5 and later.

2018-08-08 21:16:50 +00:00

Hexagon

[Hexagon] Map ISD::TRAP to J2_trap0(#0)

2018-08-09 18:03:45 +00:00

Inputs

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Lanai

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Mips

[mips] Handle branch expansion corner cases

2018-08-07 10:45:45 +00:00

MIR

[DebugInfo][X86] Add start-after flags to MIR tests

2018-07-12 14:36:48 +00:00

MSP430

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Nios2

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NVPTX

DAG: Check no-signed-zeros instead of unsafe-fp-math

2018-08-12 19:09:12 +00:00

PowerPC

[PowerPC] Enhance the selection(ISD::VSELECT) of vector type

2018-08-15 15:30:36 +00:00

RISCV

[RISCV] Fixed test case failure due to r338047

2018-07-31 00:36:28 +00:00

SPARC

Revert "[Sparc] Add support for the cycle counter available in GR740"

2018-08-13 14:18:09 +00:00

SystemZ

[RegisterCoalescer] Ensure that both registers have subranges if one does

2018-08-15 17:04:58 +00:00

Thumb

[ARM] Adjust AND immediates to make them cheaper to select.

2018-08-10 21:21:53 +00:00

Thumb2

[ARM] Treat cmn immediates as legal in isLegalICmpImmediate.

2018-07-10 23:44:37 +00:00

WebAssembly

[WebAssembly] SIMD replace_lane

2018-08-15 16:18:51 +00:00

WinCFGuard

Rename the cfguard module flag to cfguardtable

2018-08-10 09:48:53 +00:00

WinEH

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X86

[x86] add fabs test for vector intrinsic to potential libcall bug; NFC

2018-08-15 16:56:09 +00:00

XCore

[DAGCombiner] extend(ifpositive(X)) -> shift-right (not X)

2018-07-15 16:27:07 +00:00