Simon Pilgrim 1a576c57ed [X86] Add missing BITREVERSE costs for SSE2 vectors and i8/i16/i32/i64 scalars ...

Prep work for PR31810

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297876 91177308-0d34-0410-b5e6-96231b3b80d8

2017-03-15 19:34:55 +00:00

..

AArch64

[SLP] Fix for PR32038: extra add of PHI node when it is not required.

2017-03-01 10:50:44 +00:00

AMDGPU

[SLPVectorizer] Try different vectorization factors for store chains

2015-07-08 23:40:55 +00:00

ARM

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

PowerPC

[SLP] Pass in correct alignment when query memory access cost

2016-05-31 20:41:19 +00:00

X86

[X86] Add missing BITREVERSE costs for SSE2 vectors and i8/i16/i32/i64 scalars

2017-03-15 19:34:55 +00:00

XCore

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00