Files
archived-llvm/test/CodeGen/ARM/Windows/libcalls.ll
Saleem Abdulrasool 64ed61ca6b ARM: address WoA division limitation
We now emit the compiler generated divide by zero check that was needed for the
MSVC routines.  We construct a psuedo-instruction for the DBZ check as the
operation requires splitting up the BB.  For the 64-bit operations, we need to
custom expand the node as we need to insert the DBZ check and then emit the
libcall to the appropriate name.  Because this is target specific, it seemed
better to reproduce the expansion operation from the target-agnostic type
legalization rather than sink this there to avoid the duplication.  The division
library calls now match MSVC semantically.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248561 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-25 05:15:46 +00:00

76 lines
1.4 KiB
LLVM

; RUN: llc -mtriple thumbv7-windows-itanium -filetype asm -o - %s | FileCheck %s
; RUN: llc -mtriple thumbv7-windows-msvc -filetype asm -o - %s | FileCheck %s
define arm_aapcs_vfpcc i64 @stoi64(float %f) {
entry:
%conv = fptosi float %f to i64
ret i64 %conv
}
; CHECK-LABEL: stoi64
; CHECK: bl __stoi64
define arm_aapcs_vfpcc i64 @stou64(float %f) {
entry:
%conv = fptoui float %f to i64
ret i64 %conv
}
; CHECK-LABEL: stou64
; CHECK: bl __stou64
define arm_aapcs_vfpcc float @i64tos(i64 %i64) {
entry:
%conv = sitofp i64 %i64 to float
ret float %conv
}
; CHECK-LABEL: i64tos
; CHECK: bl __i64tos
define arm_aapcs_vfpcc float @u64tos(i64 %u64) {
entry:
%conv = uitofp i64 %u64 to float
ret float %conv
}
; CHECK-LABEL: u64tos
; CHECK: bl __u64tos
define arm_aapcs_vfpcc i64 @dtoi64(double %d) {
entry:
%conv = fptosi double %d to i64
ret i64 %conv
}
; CHECK-LABEL: dtoi64
; CHECK: bl __dtoi64
define arm_aapcs_vfpcc i64 @dtou64(double %d) {
entry:
%conv = fptoui double %d to i64
ret i64 %conv
}
; CHECK-LABEL: dtou64
; CHECK: bl __dtou64
define arm_aapcs_vfpcc double @i64tod(i64 %i64) {
entry:
%conv = sitofp i64 %i64 to double
ret double %conv
}
; CHECK-LABEL: i64tod
; CHECK: bl __i64tod
define arm_aapcs_vfpcc double @u64tod(i64 %i64) {
entry:
%conv = uitofp i64 %i64 to double
ret double %conv
}
; CHECK-LABEL: u64tod
; CHECK: bl __u64tod