Sanjay Patel 1167ade633 [DAG] avoid creating illegal node when transforming negated shifted sign bit ...

Eli noted this potential bug in the post-commit thread for:
https://reviews.llvm.org/rL284239
...but I'm not sure how to trigger it, so there's no test case yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284268 91177308-0d34-0410-b5e6-96231b3b80d8

2016-10-14 19:46:31 +00:00

..

CMakeLists.txt

Rename TargetSelectionDAGInfo into SelectionDAGTargetInfo and move it to CodeGen/

2016-01-27 16:32:26 +00:00

DAGCombiner.cpp

[DAG] avoid creating illegal node when transforming negated shifted sign bit

2016-10-14 19:46:31 +00:00

FastISel.cpp

swifterror: Don't compute swifterror vregs during instruction selection

2016-10-07 22:06:55 +00:00

FunctionLoweringInfo.cpp

swifterror: Don't compute swifterror vregs during instruction selection

2016-10-07 22:06:55 +00:00

InstrEmitter.cpp

Remove unnecessary call to getAllocatableRegClass

2016-09-07 06:16:45 +00:00

InstrEmitter.h

Pass DebugLoc and SDLoc by const ref.

2016-06-12 15:39:02 +00:00

LegalizeDAG.cpp

LegalizeDAG: Implement PROMOTE for ISD::BITREVERSE

2016-10-13 21:03:49 +00:00

LegalizeFloatTypes.cpp

[CodeGen] Split out the notions of MI invariance and MI dereferenceability.

2016-09-11 01:38:58 +00:00

LegalizeIntegerTypes.cpp

[SelectionDAGBuilder] Support llvm.flt.rounds on targets where i32 is not legal

2016-10-10 20:45:15 +00:00

LegalizeTypes.cpp

getValueType().getScalarSizeInBits() -> getScalarValueSizeInBits(), round 2 ; NFCI

2016-09-14 16:54:10 +00:00

LegalizeTypes.h

[SelectionDAGBuilder] Support llvm.flt.rounds on targets where i32 is not legal

2016-10-10 20:45:15 +00:00

LegalizeTypesGeneric.cpp

getValueType().getSizeInBits() -> getValueSizeInBits() ; NFCI

2016-09-14 16:05:51 +00:00

LegalizeVectorOps.cpp

getVectorElementType().getSizeInBits() -> getScalarSizeInBits() ; NFCI

2016-09-14 16:37:15 +00:00

LegalizeVectorTypes.cpp

getVectorElementType().getSizeInBits() -> getScalarSizeInBits() ; NFCI

2016-09-14 16:37:15 +00:00

LLVMBuild.txt

…

ResourcePriorityQueue.cpp

Use the range variant of find instead of unpacking begin/end

2016-08-11 22:21:41 +00:00

ScheduleDAGFast.cpp

Replace uint16_t with the MCPhysReg typedef in many places. A lot of physical register arrays already use this typedef.

2015-12-05 07:13:35 +00:00

ScheduleDAGRRList.cpp

Use the range variant of find instead of unpacking begin/end

2016-08-11 22:21:41 +00:00

ScheduleDAGSDNodes.cpp

SelectionDAG: Avoid implicit iterator conversions in ScheduleDAGSDNodes, NFC

2016-07-08 19:07:09 +00:00

ScheduleDAGSDNodes.h

[SelectionDAG] Remove dead code. NFC.

2015-10-15 17:54:06 +00:00

ScheduleDAGVLIW.cpp

Use 'override/final' instead of 'virtual' for overridden methods

2015-04-11 02:11:45 +00:00

SDNodeDbgValue.h

Apply clang-tidy's misc-move-constructor-init throughout LLVM.

2016-05-27 14:27:24 +00:00

SelectionDAG.cpp

DAG: Setting Masked-Expand-Load as a variant of Masked-Load node

2016-10-09 10:48:52 +00:00

SelectionDAGBuilder.cpp

Create llvm.addressofreturnaddress intrinsic

2016-10-12 22:13:19 +00:00

SelectionDAGBuilder.h

Delete some dead code in SelectionDAG (NFC)

2016-10-06 22:53:43 +00:00

SelectionDAGDumper.cpp

Create llvm.addressofreturnaddress intrinsic

2016-10-12 22:13:19 +00:00

SelectionDAGISel.cpp

Silence -Wunused-but-set-variable warning

2016-10-11 19:49:29 +00:00

SelectionDAGPrinter.cpp

Make the SelectionDAG graph printer use SDNode::PersistentId labels.

2015-10-27 23:09:03 +00:00

SelectionDAGTargetInfo.cpp

Rename TargetSelectionDAGInfo into SelectionDAGTargetInfo and move it to CodeGen/

2016-01-27 16:32:26 +00:00

StatepointLowering.cpp

getValueType().getSizeInBits() -> getValueSizeInBits() ; NFCI

2016-09-14 16:05:51 +00:00

StatepointLowering.h

[NFC] Header cleanup

2016-04-18 09:17:29 +00:00

TargetLowering.cpp

TargetLowering: Add SimplifyDemandedBits() helper to TargetLoweringOpt

2016-10-14 19:14:26 +00:00