Ahmed Bougacha 51348febc6 [AArch64][GlobalISel] Widen scalar int->fp conversions. ...

It's incorrect to ignore the higher bits of the integer source.
Teach the legalizer how to widen it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292563 91177308-0d34-0410-b5e6-96231b3b80d8

2017-01-20 01:37:24 +00:00

..

CallLowering.cpp

GlobalISel: correctly handle varargs

2017-01-17 22:30:10 +00:00

CMakeLists.txt

[GlobalISel] Refactor the logic to constraint registers.

2016-12-22 21:56:19 +00:00

GlobalISel.cpp

GlobalISel: rename legalizer components to match others.

2016-10-14 22:18:18 +00:00

InstructionSelect.cpp

GlobalISel: Pass the MachineFunction in to reportSelectionError directly

2017-01-20 00:16:19 +00:00

InstructionSelector.cpp

[GlobalISel] Refactor the logic to constraint registers.

2016-12-22 21:56:19 +00:00

IRTranslator.cpp

GlobalISel: Only set FailedISel on dropped dbg intrinsics when using fallback

2017-01-20 00:24:30 +00:00

Legalizer.cpp

GlobalISel: rename legalizer components to match others.

2016-10-14 22:18:18 +00:00

LegalizerHelper.cpp

[AArch64][GlobalISel] Widen scalar int->fp conversions.

2017-01-20 01:37:24 +00:00

LegalizerInfo.cpp

GlobalISel: fall back gracefully when we hit unhandled legalizer default.

2016-12-06 19:02:15 +00:00

LLVMBuild.txt

Revert "Get GlobalISel to build on Linux after r286407"

2016-11-16 22:24:59 +00:00

MachineIRBuilder.cpp

Apply clang-tidy's performance-unnecessary-value-param to LLVM.

2017-01-13 14:39:03 +00:00

RegBankSelect.cpp

[RegBankSelect] Improve the output of the debug messages.

2017-01-11 00:48:41 +00:00

RegisterBank.cpp

Re-commit: [globalisel] Tablegen-erate current Register Bank Information

2017-01-19 11:15:55 +00:00

RegisterBankInfo.cpp

[globalisel] Move as much RegisterBank initialization to the constructor as possible

2017-01-12 16:11:23 +00:00

Utils.cpp

[GlobalISel] Refactor the logic to constraint registers.

2016-12-22 21:56:19 +00:00