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archived-llvm/test/CodeGen
Krzysztof Parzyszek 7347a65675 [Hexagon] Implement basic vector operations on vectors vNi1
In addition to that, make sure that there are no boolean vector types that
are associated with multiple register classes. Specifically, remove v32i1
and v64i1 from integer register classes. These types will correspond to
results of vector comparisons, and as such should belong to the vector
predicate class. Having them in scalar registers as well makes legalization
ambiguous.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323229 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-23 17:53:59 +00:00
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