Tim Northover 13a4b7e61f GlobalISel: represent atomic loads & stores via the MachineMemOperand. ...

Also make sure the AArch64 backend doesn't try to convert them into normal
loads and stores.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294993 91177308-0d34-0410-b5e6-96231b3b80d8

2017-02-13 22:14:16 +00:00

..

CallLowering.cpp

GlobalISel: merge invoke and call translation paths.

2017-01-31 18:36:11 +00:00

CMakeLists.txt

Try to prevent build breakage by touching a CMakeLists.txt.

2017-01-25 02:55:24 +00:00

GlobalISel.cpp

GlobalISel: rename legalizer components to match others.

2016-10-14 22:18:18 +00:00

InstructionSelect.cpp

GlobalISel: tidy up def/use test. NFC.

2017-01-30 20:52:37 +00:00

InstructionSelector.cpp

[GlobalISel] Refactor the logic to constraint registers.

2016-12-22 21:56:19 +00:00

IRTranslator.cpp

GlobalISel: represent atomic loads & stores via the MachineMemOperand.

2017-02-13 22:14:16 +00:00

Legalizer.cpp

GlobalISel: rename legalizer components to match others.

2016-10-14 22:18:18 +00:00

LegalizerHelper.cpp

GlobalISel: legalize G_FPOW to a libcall on AArch64.

2017-02-08 23:23:39 +00:00

LegalizerInfo.cpp

GlobalISel: legalize G_INSERT instructions

2017-02-06 21:56:47 +00:00

LLVMBuild.txt

Revert "Get GlobalISel to build on Linux after r286407"

2016-11-16 22:24:59 +00:00

MachineIRBuilder.cpp

GlobalISel: translate dynamic alloca instructions.

2017-02-03 18:22:45 +00:00

RegBankSelect.cpp

Cleanup dump() functions.

2017-01-28 02:02:38 +00:00

RegisterBank.cpp

Cleanup dump() functions.

2017-01-28 02:02:38 +00:00

RegisterBankInfo.cpp

unique_ptrify some containers in GlobalISel::RegisterBankInfo

2017-01-30 17:13:56 +00:00

Utils.cpp

[GlobalISel] Refactor the logic to constraint registers.

2016-12-22 21:56:19 +00:00