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bfc1e953bc
This reverts r317579, originally committed as r317100.
There is a design issue with marking CFI instructions duplicatable. Not
all targets support the CFIInstrInserter pass, and targets like Darwin
can't cope with duplicated prologue setup CFI instructions. The compact
unwind info emission fails.
When the following code is compiled for arm64 on Mac at -O3, the CFI
instructions end up getting tail duplicated, which causes compact unwind
info emission to fail:
int a, c, d, e, f, g, h, i, j, k, l, m;
void n(int o, int *b) {
if (g)
f = 0;
for (; f < o; f++) {
m = a;
if (l > j * k > i)
j = i = k = d;
h = b[c] - e;
}
}
We get assembly that looks like this:
; BB#1: ; %if.then
Lloh3:
adrp x9, _f@GOTPAGE
Lloh4:
ldr x9, [x9, _f@GOTPAGEOFF]
mov w8, wzr
Lloh5:
str wzr, [x9]
stp x20, x19, [sp, #-16]! ; 8-byte Folded Spill
.cfi_def_cfa_offset 16
.cfi_offset w19, -8
.cfi_offset w20, -16
cmp w8, w0
b.lt LBB0_3
b LBB0_7
LBB0_2: ; %entry.if.end_crit_edge
Lloh6:
adrp x8, _f@GOTPAGE
Lloh7:
ldr x8, [x8, _f@GOTPAGEOFF]
Lloh8:
ldr w8, [x8]
stp x20, x19, [sp, #-16]! ; 8-byte Folded Spill
.cfi_def_cfa_offset 16
.cfi_offset w19, -8
.cfi_offset w20, -16
cmp w8, w0
b.ge LBB0_7
LBB0_3: ; %for.body.lr.ph
Note the multiple .cfi_def* directives. Compact unwind info emission
can't handle that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317726 91177308-0d34-0410-b5e6-96231b3b80d8
146 lines
3.9 KiB
LLVM
146 lines
3.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=i686-linux-gnu %s -o - | FileCheck %s
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define i32 @branch_eq(i64 %a, i64 %b) {
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; CHECK-LABEL: branch_eq:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: xorl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: xorl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: orl %ecx, %eax
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; CHECK-NEXT: jne .LBB0_2
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; CHECK-NEXT: # BB#1: # %bb1
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; CHECK-NEXT: movl $1, %eax
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; CHECK-NEXT: retl
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; CHECK-NEXT: .LBB0_2: # %bb2
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; CHECK-NEXT: movl $2, %eax
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; CHECK-NEXT: retl
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entry:
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%cmp = icmp eq i64 %a, %b
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br i1 %cmp, label %bb1, label %bb2
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bb1:
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ret i32 1
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bb2:
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ret i32 2
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}
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define i32 @branch_slt(i64 %a, i64 %b) {
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; CHECK-LABEL: branch_slt:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: cmpl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: sbbl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: jge .LBB1_2
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; CHECK-NEXT: # BB#1: # %bb1
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; CHECK-NEXT: movl $1, %eax
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; CHECK-NEXT: retl
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; CHECK-NEXT: .LBB1_2: # %bb2
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; CHECK-NEXT: movl $2, %eax
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; CHECK-NEXT: retl
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entry:
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%cmp = icmp slt i64 %a, %b
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br i1 %cmp, label %bb1, label %bb2
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bb1:
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ret i32 1
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bb2:
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ret i32 2
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}
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define i32 @branch_ule(i64 %a, i64 %b) {
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; CHECK-LABEL: branch_ule:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: cmpl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: sbbl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: jb .LBB2_2
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; CHECK-NEXT: # BB#1: # %bb1
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; CHECK-NEXT: movl $1, %eax
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; CHECK-NEXT: retl
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; CHECK-NEXT: .LBB2_2: # %bb2
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; CHECK-NEXT: movl $2, %eax
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; CHECK-NEXT: retl
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entry:
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%cmp = icmp ule i64 %a, %b
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br i1 %cmp, label %bb1, label %bb2
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bb1:
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ret i32 1
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bb2:
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ret i32 2
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}
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define i32 @set_gt(i64 %a, i64 %b) {
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; CHECK-LABEL: set_gt:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: cmpl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: sbbl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: setl %al
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; CHECK-NEXT: movzbl %al, %eax
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; CHECK-NEXT: retl
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entry:
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%cmp = icmp sgt i64 %a, %b
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%res = select i1 %cmp, i32 1, i32 0
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ret i32 %res
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}
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define i32 @test_wide(i128 %a, i128 %b) {
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; CHECK-LABEL: test_wide:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: pushl %esi
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: .cfi_offset %esi, -8
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi
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; CHECK-NEXT: cmpl {{[0-9]+}}(%esp), %edx
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; CHECK-NEXT: sbbl {{[0-9]+}}(%esp), %esi
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; CHECK-NEXT: sbbl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: sbbl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: jge .LBB4_2
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; CHECK-NEXT: # BB#1: # %bb1
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; CHECK-NEXT: movl $1, %eax
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; CHECK-NEXT: popl %esi
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; CHECK-NEXT: retl
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; CHECK-NEXT: .LBB4_2: # %bb2
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; CHECK-NEXT: movl $2, %eax
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; CHECK-NEXT: popl %esi
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; CHECK-NEXT: retl
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entry:
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%cmp = icmp slt i128 %a, %b
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br i1 %cmp, label %bb1, label %bb2
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bb1:
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ret i32 1
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bb2:
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ret i32 2
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}
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; The comparison of the low bits will be folded to a CARRY_FALSE node. Make
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; sure the code can handle that.
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define i32 @test_carry_false(i64 %a, i64 %b) {
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; CHECK-LABEL: test_carry_false:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: cmpl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: jge .LBB5_2
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; CHECK-NEXT: # BB#1: # %bb1
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; CHECK-NEXT: movl $1, %eax
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; CHECK-NEXT: retl
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; CHECK-NEXT: .LBB5_2: # %bb2
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; CHECK-NEXT: movl $2, %eax
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; CHECK-NEXT: retl
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entry:
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%x = and i64 %a, -4294967296 ;0xffffffff00000000
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%y = and i64 %b, -4294967296
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%cmp = icmp slt i64 %x, %y
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br i1 %cmp, label %bb1, label %bb2
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bb1:
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ret i32 1
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bb2:
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ret i32 2
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}
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