Oliver Stannard 3a22eb400f [ARM] Fix select_cc lowering for fp16 ...

When lowering a select_cc node where the true and false values are of type f16,
we can't use a general conditional move because the FP16 instructions do not
support conditional execution. Instead, we must ensure that the condition code
is one of the four supported by the VSEL instruction.

Differential revision: https://reviews.llvm.org/D58813



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355385 91177308-0d34-0410-b5e6-96231b3b80d8

2019-03-05 10:42:34 +00:00

..

CGP

[ARM] Negative constants mishandled in ARM CGP

2019-02-21 09:33:18 +00:00

GlobalISel

[ARM GlobalISel] Support G_CTLZ for Thumb2

2019-03-01 10:12:28 +00:00

Windows

Replace "no-frame-pointer-*" function attributes with "frame-pointer"

2019-01-14 10:55:55 +00:00

2006-11-10-CycleInDAG.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2007-01-19-InfiniteLoop.ll

[ARM] Generate consistent frame records for Thumb2

2016-08-23 09:19:22 +00:00

2007-03-07-CombinerCrash.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2007-03-13-InstrSched.ll

test: modernise ARM CodeGen tests

2016-12-27 18:35:19 +00:00

2007-03-21-JoinIntervalsCrash.ll

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

2007-03-27-RegScavengerAssert.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

2007-03-30-RegScavengerAssert.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

2007-04-02-RegScavengerAssert.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

2007-04-03-PEIBug.ll

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

2007-04-03-UndefinedSymbol.ll

test: modernise ARM CodeGen tests

2016-12-27 18:35:19 +00:00

2007-04-30-CombinerCrash.ll

[opaque pointer type] Add textual IR support for explicit type parameter to gep operator

2015-03-13 18:20:45 +00:00

2007-05-03-BadPostIndexedLd.ll

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

2007-05-07-tailmerge-1.ll

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

2007-05-09-tailmerge-2.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

2007-05-14-InlineAsmCstCrash.ll

…

2007-05-14-RegScavengerAssert.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

2007-05-22-tailmerge-3.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

2007-05-23-BadPreIndexedStore.ll

[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction

2015-02-27 19:29:02 +00:00

2007-08-15-ReuseBug.ll

[opaque pointer type] Add textual IR support for explicit type parameter to gep operator

2015-03-13 18:20:45 +00:00

2008-02-04-LocalRegAllocBug.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2008-02-29-RegAllocLocal.ll

[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction

2015-02-27 19:29:02 +00:00

2008-03-05-SxtInRegBug.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2008-03-07-RegScavengerAssert.ll

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

2008-04-04-ScavengerAssert.ll

[opaque pointer type] Add textual IR support for explicit type parameter to gep operator

2015-03-13 18:20:45 +00:00

2008-04-10-ScavengerAssert.ll

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

2008-04-11-PHIofImpDef.ll

…

2008-05-19-LiveIntervalsBug.ll

[opaque pointer type] Add textual IR support for explicit type parameter to gep operator

2015-03-13 18:20:45 +00:00

2008-05-19-ScavengerAssert.ll

[opaque pointer type] Add textual IR support for explicit type parameter to gep operator

2015-03-13 18:20:45 +00:00

2008-07-17-Fdiv.ll

…

2008-07-24-CodeGenPrepCrash.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2008-08-07-AsmPrintBug.ll

test: modernise ARM CodeGen tests

2016-12-27 18:35:19 +00:00

2008-09-17-CoalescerBug.ll

…

2008-11-18-ScavengerAssert.ll

…

2009-02-16-SpillerBug.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

2009-02-22-SoftenFloatVaArg.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2009-02-27-SpillerBug.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

2009-03-07-SpillerBug.ll

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

2009-03-09-AddrModeBug.ll

[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction

2015-02-27 19:29:02 +00:00

2009-04-06-AsmModifier.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2009-04-08-AggregateAddr.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2009-04-08-FloatUndef.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2009-04-08-FREM.ll

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

2009-04-09-RegScavengerAsm.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2009-05-05-DAGCombineBug.ll

…

2009-05-07-RegAllocLocal.ll

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

2009-05-11-CodePlacementCrash.ll

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

2009-05-18-InlineAsmMem.ll

[ARM] Avoid using ARM instructions in Thumb mode

2017-01-31 14:35:01 +00:00

2009-06-02-ISelCrash.ll

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

2009-06-04-MissingLiveIn.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2009-06-15-RegScavengerAssert.ll

…

2009-06-19-RegScavengerAssert.ll

…

2009-06-22-CoalescerBug.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2009-06-30-RegScavengerAssert2.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

2009-06-30-RegScavengerAssert3.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

2009-06-30-RegScavengerAssert4.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

2009-06-30-RegScavengerAssert5.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

2009-06-30-RegScavengerAssert.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

2009-07-01-CommuteBug.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

2009-07-09-asm-p-constraint.ll

…

2009-07-18-RewriterBug.ll

test: modernise ARM CodeGen tests

2016-12-27 18:35:19 +00:00

2009-07-22-ScavengerAssert.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2009-07-22-SchedulerAssert.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2009-07-29-VFP3Registers.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2009-08-02-RegScavengerAssert-Neon.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

2009-08-04-RegScavengerAssert-2.ll

…

2009-08-04-RegScavengerAssert.ll

…

2009-08-15-RegScavenger-EarlyClobber.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2009-08-15-RegScavengerAssert.ll

…

2009-08-21-PostRAKill2.ll

Replace "no-frame-pointer-*" function attributes with "frame-pointer"

2019-01-14 10:55:55 +00:00

2009-08-21-PostRAKill3.ll

Replace "no-frame-pointer-*" function attributes with "frame-pointer"

2019-01-14 10:55:55 +00:00

2009-08-21-PostRAKill.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

2009-08-26-ScalarToVector.ll

test: modernise ARM CodeGen tests

2016-12-27 18:35:19 +00:00

2009-08-27-ScalarToVector.ll

test: modernise ARM CodeGen tests

2016-12-27 18:35:19 +00:00

2009-08-29-ExtractEltf32.ll

…

2009-08-29-TooLongSplat.ll

…

2009-08-31-LSDA-Name.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

2009-08-31-TwoRegShuffle.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2009-09-09-AllOnes.ll

…

2009-09-09-fpcmp-ole.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

2009-09-10-postdec.ll

…

2009-09-13-InvalidSubreg.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2009-09-13-InvalidSuperReg.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2009-09-20-LiveIntervalsBug.ll

…

2009-09-21-LiveVariablesBug.ll

…

2009-09-22-LiveVariablesBug.ll

…

2009-09-23-LiveVariablesBug.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2009-09-24-spill-align.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2009-09-27-CoalescerBug.ll

…

2009-09-28-LdStOptiBug.ll

[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction

2015-02-27 19:29:02 +00:00

2009-10-02-NEONSubregsBug.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2009-10-16-Scope.ll

[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.

2016-04-15 15:57:41 +00:00

2009-10-27-double-align.ll

Re-land MachineInstr: Reason locally about some memory objects before going to AA.

2017-08-30 14:57:12 +00:00

2009-10-30.ll

…

2009-11-01-NeonMoves.ll

[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction

2015-02-27 19:29:02 +00:00

2009-11-02-NegativeLane.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2009-11-07-SubRegAsmPrinting.ll

[ARM] preserve test intent by removing undef

2018-05-17 18:09:56 +00:00

2009-11-13-CoalescerCrash.ll

…

2009-11-13-ScavengerAssert2.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2009-11-13-ScavengerAssert.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2009-11-13-VRRewriterCrash.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2009-11-30-LiveVariablesBug.ll

…

2009-12-02-vtrn-undef.ll

[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction

2015-02-27 19:29:02 +00:00

2010-03-04-eabi-fp-spill.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2010-03-04-stm-undef-addr.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2010-03-18-ldm-rtrn.ll

…

2010-04-09-NeonSelect.ll

…

2010-04-13-v2f64SplitArg.ll

…

2010-04-14-SplitVector.ll

…

2010-04-15-ScavengerDebugValue.ll

Remove the obsolete offset parameter from @llvm.dbg.value

2017-07-28 20:21:02 +00:00

2010-05-14-IllegalType.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

2010-05-17-FastAllocCrash.ll

[opaque pointer type] Add textual IR support for explicit type parameter to gep operator

2015-03-13 18:20:45 +00:00

2010-05-18-LocalAllocCrash.ll

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

2010-05-18-PostIndexBug.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2010-05-19-Shuffles.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2010-05-20-NEONSpillCrash.ll

[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions

2015-09-30 10:56:37 +00:00

2010-05-21-BuildVector.ll

[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions

2015-09-30 10:56:37 +00:00

2010-06-11-vmovdrr-bitcast.ll

[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions

2015-09-30 10:56:37 +00:00

2010-06-21-LdStMultipleBug.ll

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

2010-06-21-nondarwin-tc.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

2010-06-25-Thumb2ITInvalidIterator.ll

Canonicalize the representation of empty an expression in DIGlobalVariableExpression

2017-08-30 18:06:51 +00:00

2010-06-29-PartialRedefFastAlloc.ll

[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.

2017-12-07 10:40:31 +00:00

2010-06-29-SubregImpDefs.ll

[opaque pointer type] Add textual IR support for explicit type parameter to gep operator

2015-03-13 18:20:45 +00:00

2010-07-26-GlobalMerge.ll

Move the personality function from LandingPadInst to Function

2015-06-17 20:52:32 +00:00

2010-08-04-EHCrash.ll

Move the personality function from LandingPadInst to Function

2015-06-17 20:52:32 +00:00

2010-08-04-StackVariable.ll

Remove the obsolete offset parameter from @llvm.dbg.value

2017-07-28 20:21:02 +00:00

2010-09-21-OptCmpBug.ll

…

2010-10-25-ifcvt-ldm.ll

ARM & AArch64: make use of common cmpxchg idioms after expansion

2014-05-30 10:09:59 +00:00

2010-11-15-SpillEarlyClobber.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2010-11-29-PrologueBug.ll

[ARM] Generate consistent frame records for Thumb2

2016-08-23 09:19:22 +00:00

2010-12-07-PEIBug.ll

[ARM] Generate consistent frame records for Thumb2

2016-08-23 09:19:22 +00:00

2010-12-08-tpsoft.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2010-12-15-elf-lcomm.ll

[GlobalMerge] Look at uses to create smaller global sets.

2015-04-18 01:21:58 +00:00

2010-12-17-LocalStackSlotCrash.ll

[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction

2015-02-27 19:29:02 +00:00

2011-01-19-MergedGlobalDbg.ll

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

2011-02-04-AntidepMultidef.ll

Elide stores which are overwritten without being observed.

2017-05-16 19:43:56 +00:00

2011-02-07-AntidepClobber.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2011-03-10-DAGCombineCrash.ll

Replace "no-frame-pointer-*" function attributes with "frame-pointer"

2019-01-14 10:55:55 +00:00

2011-03-15-LdStMultipleBug.ll

Replace "no-frame-pointer-*" function attributes with "frame-pointer"

2019-01-14 10:55:55 +00:00

2011-03-23-PeepholeBug.ll

Replace "no-frame-pointer-*" function attributes with "frame-pointer"

2019-01-14 10:55:55 +00:00

2011-04-07-schediv.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2011-04-11-MachineLICMBug.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2011-04-12-AlignBug.ll

ARM: remove ARM/Thumb distinction for preferred alignment.

2014-10-14 22:12:17 +00:00

2011-04-12-FastRegAlloc.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2011-04-15-AndVFlagPeepholeBug.ll

ARM: stop emitting blx instructions for most calls on MachO.

2016-05-10 19:17:47 +00:00

2011-04-15-RegisterCmpPeephole.ll

ARM: stop emitting blx instructions for most calls on MachO.

2016-05-10 19:17:47 +00:00

2011-04-26-SchedTweak.ll

ARM: stop emitting blx instructions for most calls on MachO.

2016-05-10 19:17:47 +00:00

2011-04-27-IfCvtBug.ll

…

2011-05-04-MultipleLandingPadSuccs.ll

[Verifier] Add verification for TBAA metadata

2016-12-11 20:07:15 +00:00

2011-06-09-TailCallByVal.ll

ARM: stop emitting blx instructions for most calls on MachO.

2016-05-10 19:17:47 +00:00

2011-06-16-TailCallByVal.ll

…

2011-06-29-MergeGlobalsAlign.ll

Revert "Use private linkage for MergedGlobals variables" on Darwin.

2016-11-11 17:50:09 +00:00

2011-07-10-GlobalMergeBug.ll

…

2011-08-02-MergedGlobalDbg.ll

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

2011-08-12-vmovqqqq-pseudo.ll

[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions

2015-09-30 10:56:37 +00:00

2011-08-25-ldmia_ret.ll

[ARM] Generate consistent frame records for Thumb2

2016-08-23 09:19:22 +00:00

2011-08-29-ldr_pre_imm.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2011-08-29-SchedCycle.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2011-09-09-OddVectorDivision.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2011-09-19-cpsr.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

2011-09-28-CMovCombineBug.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2011-10-26-ExpandUnalignedLoadCrash.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

2011-10-26-memset-inline.ll

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

2011-10-26-memset-with-neon.ll

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

2011-11-07-PromoteVectorLoadStore.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2011-11-09-BitcastVectorDouble.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2011-11-09-IllegalVectorFPIntConvert.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2011-11-14-EarlyClobber.ll

[CodeGen] Don't print "pred:" and "opt:" in -debug output

2018-01-09 17:31:07 +00:00

2011-11-28-DAGCombineBug.ll

[opaque pointer type] Add textual IR support for explicit type parameter to gep operator

2015-03-13 18:20:45 +00:00

2011-11-29-128bitArithmetics.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2011-11-30-MergeAlignment.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2011-12-14-machine-sink.ll

Improve test robustness

2015-03-04 22:31:18 +00:00

2011-12-19-sjlj-clobber.ll

Move the personality function from LandingPadInst to Function

2015-06-17 20:52:32 +00:00

2012-01-23-PostRA-LICM.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2012-01-24-RegSequenceLiveRange.ll

[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions

2015-09-30 10:56:37 +00:00

2012-01-26-CoalescerBug.ll

…

2012-01-26-CopyPropKills.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2012-02-01-CoalescerBug.ll

[opaque pointer type] Add textual IR support for explicit type parameter to gep operator

2015-03-13 18:20:45 +00:00

2012-03-05-FPSCR-bug.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

2012-03-13-DAGCombineBug.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2012-03-26-FoldImmBug.ll

…

2012-04-02-TwoAddrInstrCrash.ll

…

2012-04-10-DAGCombine.ll

…

2012-04-24-SplitEHCriticalEdge.ll

Replace "no-frame-pointer-*" function attributes with "frame-pointer"

2019-01-14 10:55:55 +00:00

2012-05-04-vmov.ll

…

2012-05-10-PreferVMOVtoVDUP32.ll

[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions

2015-09-30 10:56:37 +00:00

2012-05-29-TailDupBug.ll

…

2012-06-12-SchedMemLatency.ll

[CodeGen] Use MIR syntax for MachineMemOperand printing

2018-03-14 21:52:13 +00:00

2012-08-04-DtripleSpillReload.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2012-08-08-legalize-unaligned.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2012-08-09-neon-extload.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2012-08-13-bfi.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

2012-08-23-legalize-vmull.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2012-08-27-CopyPhysRegCrash.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

2012-08-30-select.ll

Don't conditionalize Neon instructions, even in IT blocks.

2017-06-22 12:11:38 +00:00

2012-09-18-ARMv4ISelBug.ll

…

2012-09-25-InlineAsmScalarToVectorConv2.ll

[SelectionDAG] Remove exit-on-error flag from test (PR27765)

2016-06-14 07:30:20 +00:00

2012-09-25-InlineAsmScalarToVectorConv.ll

IR: Make metadata typeless in assembly

2014-12-15 19:07:53 +00:00

2012-10-04-AAPCS-byval-align8.ll

Elide stores which are overwritten without being observed.

2017-05-16 19:43:56 +00:00

2012-10-04-FixedFrame-vs-byval.ll

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

2012-10-04-LDRB_POST_IMM-Crash.ll

…

2012-10-18-PR14099-ByvalFrameAddress.ll

[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).

2017-06-28 07:07:03 +00:00

2012-11-14-subs_carry.ll

[SelectionDAG] Swap commutative binops before constant-based folding

2015-09-06 05:42:13 +00:00

2013-01-21-PR14992.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2013-02-27-expand-vfma.ll

…

2013-04-05-Small-ByVal-Structs-PR15293.ll

ARM: simplify and extend byval handling

2015-03-11 18:54:22 +00:00

2013-04-16-AAPCS-C4-vs-VFP.ll

…

2013-04-16-AAPCS-C5-vs-VFP.ll

ARM: When spilling extra registers for alignment, prefer low registers on all Thumb targets.

2015-04-23 20:31:26 +00:00

2013-04-18-load-overlap-PR14824.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2013-04-21-AAPCS-VA-C.1.cp.ll

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP2.ll

ARM: When spilling extra registers for alignment, prefer low registers on all Thumb targets.

2015-04-23 20:31:26 +00:00

2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP.ll

ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2

2015-07-21 00:18:59 +00:00

2013-05-05-IfConvertBug.ll

AArch64 & ARM: remove undefined behaviour from some tests.

2014-05-30 08:59:55 +00:00

2013-05-07-ByteLoadSameAddress.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2013-05-13-AAPCS-byval-padding2.ll

ARMLoadStoreOptimizer: Rewrite LDM/STM matching logic.

2015-07-10 18:08:49 +00:00

2013-05-13-AAPCS-byval-padding.ll

ARM: simplify and extend byval handling

2015-03-11 18:54:22 +00:00

2013-05-13-DAGCombiner-undef-mask.ll

DAG: Fix extract_subvector combine for a single element

2018-06-11 21:27:41 +00:00

2013-05-31-char-shift-crash.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2013-06-03-ByVal-2Kbytes.ll

…

2013-07-29-vector-or-combine.ll

[ARM] preserve test intent by removing undef

2018-02-10 15:14:00 +00:00

2013-10-11-select-stalls.ll

[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions

2015-09-30 10:56:37 +00:00

2013-11-08-inline-asm-neon-array.ll

…

2014-01-09-pseudo_expand_implicit_reg.ll

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

2014-02-05-vfp-regs-after-stack.ll

…

2014-02-21-byval-reg-split-alignment.ll

ARM: simplify and extend byval handling

2015-03-11 18:54:22 +00:00

2014-05-14-DwarfEHCrash.ll

Move the personality function from LandingPadInst to Function

2015-06-17 20:52:32 +00:00

2014-07-18-earlyclobber-str-post.ll

[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction

2015-02-27 19:29:02 +00:00

2014-08-04-muls-it.ll

[SimplifyCFG] Swap to using TargetTransformInfo for cost

2015-02-11 12:15:41 +00:00

2015-01-21-thumbv4t-ldstr-opt.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

2016-05-01-RegScavengerAssert.ll

[ARM] Fix Scavenger assert due to underestimated stack size

2016-05-08 05:11:54 +00:00

2016-08-24-ARM-LDST-dbginfo-bug.ll

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

2018-02-13-PR36079.ll

[LegalizeDAG] Fix legalization of SETCC

2018-02-16 09:35:16 +00:00

a15-mla.ll

…

a15-partial-update.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

a15-SD-dep.ll

[ARM] Add new feature to enable optimizing the VFP registers

2018-07-20 16:49:28 +00:00

a15.ll

…

aapcs-hfa-code.ll

[ARM] Enable DP copy, load and store instructions for FPv4-SP

2014-08-21 12:50:31 +00:00

aapcs-hfa.ll

Attempt to pacify the bots - this commit requires asserts.

2014-05-09 16:20:53 +00:00

acle-intrinsics-rot.ll

[ARM] Rotated operand patterns for *xtb16

2018-08-22 12:58:36 +00:00

acle-intrinsics-v5.ll

[ARM] ACLE Chapter 9 intrinsics

2017-05-04 07:31:28 +00:00

acle-intrinsics.ll

[ARM] ACLE Chapter 9 intrinsics

2017-05-04 07:31:28 +00:00

add-like-or.ll

ARM: convert ORR instructions to ADD where possible on Thumb.

2018-06-20 12:09:44 +00:00

addrmode.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

addrspacecast.ll

…

addsubcarry-promotion.ll

[DAG] Promote ADDCARRY / SUBCARRY

2017-12-13 10:45:21 +00:00

adv-copy-opt.ll

ARM: Enable MachineScheduler and disable PostRAScheduler for swift.

2015-07-17 23:18:30 +00:00

aeabi-read-tp.ll

ARM: support -mlong-calls with AEABI TLS on ELF

2017-01-29 16:46:22 +00:00

aggregate-padding.ll

[ARM] Fix over-alignment in arguments that are HA of 128-bit vectors

2018-07-30 08:49:30 +00:00

alias_align.ll

[DAGCombine] Fix alignment for offset loads/stores

2018-06-21 08:30:07 +00:00

alias_store.ll

Use .set instead of = when printing assignment in assembly output

2018-03-27 16:44:41 +00:00

aliases.ll

Use .set instead of = when printing assignment in assembly output

2018-03-27 16:44:41 +00:00

align-sp-adjustment.ll

Revert "[ARM] Mark LEApcrel instructions as isAsCheapAsAMove"

2017-05-16 17:59:07 +00:00

align.ll

[MC] Use .p2align instead of .align

2016-01-26 00:03:25 +00:00

alloc-no-stack-realign.ll

[DAGCombine] Disable finding better chains for stores at O0

2017-11-28 04:07:59 +00:00

alloca-align.ll

ARM: use correct offset from base pointer (r6) in call frame regions.

2018-12-07 13:43:55 +00:00

alloca.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

analyze-branch-bkpt.ll

ARM: Use BKPT instead of TRAP to implement llvm.debugtrap.

2018-10-24 18:10:38 +00:00

and-cmpz.ll

[ARM] Adjust AND immediates to make them cheaper to select.

2018-08-10 21:21:53 +00:00

and-load-combine.ll

[DAGCombine] Fix ReduceLoadWidth for shifted offsets

2019-01-16 08:40:12 +00:00

apcs-vfp.ll

ARM: add extra test for watchOS ABI

2015-10-30 16:29:44 +00:00

arg-copy-elide.ll

[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).

2017-06-28 07:07:03 +00:00

argaddr.ll

…

arguments2.ll

…

arguments3.ll

…

arguments4.ll

…

arguments5.ll

…

arguments6.ll

…

arguments7.ll

…

arguments8.ll

…

arguments_f64_backfill.ll

…

arguments-nosplit-double.ll

NFC: I simply added CHECK-LABEL to prevent false matches in the tests.

2017-07-07 13:41:33 +00:00

arguments-nosplit-i64.ll

NFC: I simply added CHECK-LABEL to prevent false matches in the tests.

2017-07-07 13:41:33 +00:00

arguments.ll

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

arm32-round-conv.ll

[AArch32] Add patterns for VCVT{A,N,P,M}.

2014-08-25 16:56:33 +00:00

arm32-rounding.ll

Revert "CodeGen: ensure that libcalls are always AAPCS CC"

2016-09-07 03:17:19 +00:00

arm-abi-attr.ll

Unified logic for computing target ABI in backend and front end by moving this common code to Support/TargetParser.

2017-06-30 00:03:54 +00:00

arm-and-tst-peephole.ll

[ARM] Add some more missing T1 opcodes for the peephole optimisier

2019-02-25 15:50:54 +00:00

arm-asm.ll

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

arm-eabi.ll

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

arm-frame-lowering-no-terminator.ll

ARM: Avoid dereferencing end() in ARMFrameLowering::emitEpilogue

2016-08-21 00:08:10 +00:00

arm-frameaddr.ll

…

arm-insert-subvector.ll

[ARM] Check for assembler instructions in test.

2017-08-23 11:53:24 +00:00

arm-macho-tail.ll

ARM: use an external relocation for calls from MachO ARM mode.

2017-08-18 19:13:56 +00:00

arm-modifier.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

arm-negative-stride.ll

[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction

2015-02-27 19:29:02 +00:00

arm-position-independence-jump-table.ll

[ARM] Place jump table as the first operand in additions

2017-11-13 11:56:48 +00:00

arm-position-independence.ll

[ARM] Make RWPI use movw/movt when available

2017-02-07 13:07:12 +00:00

arm-returnaddr.ll

PrologEpilogInserter: Rewrite API to determine callee save regsiters.

2015-07-14 17:17:13 +00:00

arm-shrink-wrapping-linux.ll

[ARM] Treat cmn immediates as legal in isLegalICmpImmediate.

2018-07-10 23:44:37 +00:00

arm-shrink-wrapping.ll

[SchedModel] Fix for read advance cycles with implicit pseudo operands.

2018-10-30 15:04:40 +00:00

arm-storebytesmerge.ll

[DAGCombine] Improve alias analysis for chain of independent stores.

2018-11-08 19:14:20 +00:00

arm-ttype-target2.ll

Move the personality function from LandingPadInst to Function

2015-06-17 20:52:32 +00:00

arm-vld1.ll

[NEON] Support VLD1xN intrinsics in AArch32 mode (LLVM part)

2018-06-02 16:40:03 +00:00

arm-vlddup-update.ll

[NEON] Fix combining of vldx_dup intrinsics with updating of base addresses

2018-07-05 08:59:49 +00:00

arm-vlddup.ll

[NEON] Support vldNq intrinsics in AArch32 (LLVM part)

2018-06-27 13:57:52 +00:00

arm-vst1.ll

[NEON] Support VST1xN intrinsics in AArch32 mode (LLVM part)

2018-06-10 09:27:27 +00:00

ARMLoadStoreDBG.mir

MachineOperand/MIParser: Do not print debug-use flag, infer it

2018-10-30 23:28:27 +00:00

armv4.ll

Fix ARMv4 support

2017-08-28 20:20:47 +00:00

armv8.2a-fp16-vector-intrinsics.ll

[ARM] Added FP16 VREV Vector Instrinsic CodeGen support

2018-08-13 08:37:41 +00:00

atomic-64bit.ll

ARM: Better codegen for 64-bit compares.

2016-03-21 18:00:02 +00:00

atomic-cmp.ll

[ARM] Emit clrex in the expanded cmpxchg fail block.

2015-09-22 17:22:58 +00:00

atomic-cmpxchg.ll

[ARM] Add missing pseudo-instruction for Thumb1 RSBS.

2018-10-31 21:45:48 +00:00

atomic-load-store.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

atomic-op.ll

NFC - Various typo fixes in tests

2018-07-04 13:28:39 +00:00

atomic-ops-m33.ll

ARM: use acquire/release instruction variants when available.

2018-12-17 15:05:32 +00:00

atomic-ops-v8.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

atomicrmw_minmax.ll

…

available_externally.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

avoid-cpsr-rmw.ll

[SimplifyCFG] Avoid quadratic on a predecessors number behavior in instruction sinking.

2017-12-21 01:22:13 +00:00

bfc.ll

…

bfi.ll

[ARM] Prefer BIC over BFC in ARM mode.

2017-04-07 22:01:23 +00:00

bfx.ll

[ARM] Add additional matching for UBFX instructions

2016-06-01 12:01:01 +00:00

bic.ll

[ARM] Prefer BIC over BFC in ARM mode.

2017-04-07 22:01:23 +00:00

bicZext.ll

…

big-endian-eh-unwind.ll

Move the personality function from LandingPadInst to Function

2015-06-17 20:52:32 +00:00

big-endian-neon-bitconv.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

big-endian-neon-extend.ll

[ARM] Enable vector extload combine for legal types.

2015-03-05 19:37:53 +00:00

big-endian-neon-trunc-store.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

big-endian-ret-f64.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

big-endian-vector-callee.ll

[ARM] Split 128-bit vectors in BUILD_VECTOR lowering

2016-12-14 20:44:38 +00:00

big-endian-vector-caller.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

bit-reverse-to-rbit.ll

RBIT Instruction only available for ARMv6t2 and above.

2016-01-08 18:43:41 +00:00

bits.ll

…

bool-ext-inc.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

bswap16.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

bswap-inline-asm.ll

…

build-attributes-encoding.s

[ARM] Add DSP build attribute and extension targeting

2016-01-25 11:26:11 +00:00

build-attributes-fn-attr0.ll

[llvm] Remove redundant --check-prefix=CHECK from tests

2016-10-24 18:57:55 +00:00

build-attributes-fn-attr1.ll

[llvm] Remove redundant --check-prefix=CHECK from tests

2016-10-24 18:57:55 +00:00

build-attributes-fn-attr2.ll

[llvm] Remove redundant --check-prefix=CHECK from tests

2016-10-24 18:57:55 +00:00

build-attributes-fn-attr3.ll

[llvm] Remove redundant --check-prefix=CHECK from tests

2016-10-24 18:57:55 +00:00

build-attributes-fn-attr4.ll

[llvm] Remove redundant --check-prefix=CHECK from tests

2016-10-24 18:57:55 +00:00

build-attributes-fn-attr5.ll

Reapply r284571 (with the new tests fixed).

2016-10-19 13:43:02 +00:00

build-attributes-fn-attr6.ll

This is a 1 character fix for an ARM build attribute test (r284571): the

2016-11-01 15:59:37 +00:00

build-attributes-optimization-minsize.ll

[ARM] Generate ABI_optimization_goals build attribute, as described in the ARM ARM.

2015-12-07 14:22:39 +00:00

build-attributes-optimization-mixed.ll

[ARM] Generate ABI_optimization_goals build attribute, as described in the ARM ARM.

2015-12-07 14:22:39 +00:00

build-attributes-optimization-optnone.ll

[ARM] Generate ABI_optimization_goals build attribute, as described in the ARM ARM.

2015-12-07 14:22:39 +00:00

build-attributes-optimization-optsize.ll

[ARM] Generate ABI_optimization_goals build attribute, as described in the ARM ARM.

2015-12-07 14:22:39 +00:00

build-attributes-optimization.ll

[ARM] Generate ABI_optimization_goals build attribute, as described in the ARM ARM.

2015-12-07 14:22:39 +00:00

build-attributes.ll

[ARM] Add Cortex-M35P

2019-02-26 12:02:12 +00:00

bx_fold.ll

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

byval_load_align.ll

[MC] Use .p2align instead of .align

2016-01-26 00:03:25 +00:00

byval-align.ll

ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2

2015-07-21 00:18:59 +00:00

cache-intrinsic.ll

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

call_nolink.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

call-noret-minsize.ll

…

call-noret.ll

…

call-tc.ll

[Thumb] Teach ISel how to lower compares of AND bitmasks efficiently

2016-12-15 09:38:59 +00:00

call.ll

Don't print (PLT) on arm.

2016-06-16 16:09:53 +00:00

carry.ll

Address buildbot fallout from r259065

2016-01-28 18:59:04 +00:00

cbz-implicit-it-range.ll

[ARM] Account for implicit IT when calculating inline asm size

2018-10-08 09:38:28 +00:00

cdp2.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

cdp.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

cfi-alignment.ll

ARM: add support for WatchOS's compact unwind information.

2015-10-28 22:56:36 +00:00

clang-section.ll

Add support for #pragma clang section

2017-06-05 10:09:13 +00:00

clz.ll

[ARM] Lower llvm.ctlz.i32 to a libcall when clz is not available.

2018-08-22 21:47:14 +00:00

cmn.ll

[ARM] Make InstrEmitter mark CPSR defs dead for Thumb1.

2018-10-26 19:32:24 +00:00

cmp1-peephole-thumb.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

cmp2-peephole-thumb.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

cmp.ll

ARM: use target-specific SUBS node when combining cmp with cmov.

2018-12-03 11:16:21 +00:00

cmpxchg-idioms.ll

ARM: sink atomic release barrier as far as possible into cmpxchg.

2016-02-22 20:55:50 +00:00

cmpxchg-O0-be.ll

ARM: fix big-endian 64-bit cmpxchg.

2017-06-30 19:51:02 +00:00

cmpxchg-O0.ll

[ARM] Materialise some boolean values to avoid a branch

2018-02-16 09:23:59 +00:00

cmpxchg-weak.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

cmpxchg.mir

Fixed typos in tests: s/CHEKC/CHECK/

2019-02-25 13:41:59 +00:00

coalesce-dbgvalue.ll

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

coalesce-subregs.ll

[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions

2015-09-30 10:56:37 +00:00

code-placement.ll

[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).

2017-06-28 07:07:03 +00:00

codemodel.ll

[Targets] Add errors for tiny and kernel codemodel on targets that don't support them

2018-12-07 12:10:23 +00:00

coff-no-dead-strip.ll

test: fix ARM tests harder

2018-01-20 01:26:46 +00:00

combine-movc-sub.ll

[ARM] optimizeSelect should clear kill flags.

2015-04-30 23:57:47 +00:00

combine-vmovdrr.ll

[ARM] When a bitcast is about to be turned into a VMOVDRR, try to combine it

2015-12-04 01:53:14 +00:00

commute-movcc.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

compare-call.ll

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

constant-island-crash.ll

[Thumb-1] Synthesize TBB/TBH instructions to make use of compressed jump tables

2016-11-01 13:37:41 +00:00

constant-island-movwt.mir

[ARM] Avoid injecting constant islands in movw+movt pairs on Windows

2018-08-22 20:34:12 +00:00

constant-islands-cfg.mir

Revert r325754 and r325755 (f16 literal pool) because buildbots were unhappy.

2018-02-22 08:41:55 +00:00

constant-islands.ll

ARM: avoid duplicating branches during constant islands.

2014-11-13 17:58:51 +00:00

constantfp.ll

Rewrite ARM execute only support to avoid the use of a command line flag and unqualified ARMSubtarget lookup.

2017-07-01 02:55:22 +00:00

constantpool-align.ll

[SDAG] Use ABI type alignment for constant pools when optimizing for size

2016-10-17 12:54:07 +00:00

constantpool-promote-dbg.ll

Remove irrelevant references to legacy git repositories from

2019-01-15 16:18:52 +00:00

constantpool-promote-duplicate.ll

ARM: track globals promoted to coalesced const pool entries

2017-09-07 04:00:13 +00:00

constantpool-promote-ldrh.ll

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

constantpool-promote.ll

[ARM] Fix correctness checks in promoteToConstantPool.

2018-09-28 20:27:31 +00:00

constants.ll

AsmPrinter: Use emitGlobalConstantFP to emit elements of constant data

2015-12-08 02:37:48 +00:00

copy-by-struct-i32.ll

[ARM] Set Defs = [CPSR] for COPY_STRUCT_BYVAL, as it clobbers CPSR.

2018-12-21 18:07:10 +00:00

copy-cpsr.ll

ARM: allow copying of CPSR when all else fails.

2014-10-01 19:21:03 +00:00

copy-paired-reg.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

cortex-a57-misched-alu.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

cortex-a57-misched-basic.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

cortex-a57-misched-ldm-wrback.ll

[SchedModel] Fix for read advance cycles with implicit pseudo operands.

2018-10-30 15:04:40 +00:00

cortex-a57-misched-ldm.ll

[SchedModel] Fix for read advance cycles with implicit pseudo operands.

2018-10-30 15:04:40 +00:00

cortex-a57-misched-stm-wrback.ll

[CodeGen] Add dependency printer

2017-07-12 15:30:59 +00:00

cortex-a57-misched-stm.ll

[ARM] Cortex-A57 scheduling model for ARM backend (AArch32)

2017-06-02 08:53:19 +00:00

cortex-a57-misched-vadd.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

cortex-a57-misched-vfma.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

cortex-a57-misched-vldm-wrback.ll

[SchedModel] Fix for read advance cycles with implicit pseudo operands.

2018-10-30 15:04:40 +00:00

cortex-a57-misched-vldm.ll

[SchedModel] Fix for read advance cycles with implicit pseudo operands.

2018-10-30 15:04:40 +00:00

cortex-a57-misched-vstm-wrback.ll

[CodeGen] Add dependency printer

2017-07-12 15:30:59 +00:00

cortex-a57-misched-vstm.ll

[ARM] Cortex-A57 scheduling model for ARM backend (AArch32)

2017-06-02 08:53:19 +00:00

cortex-a57-misched-vsub.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

cortexr52-misched-basic.ll

[ARM] Enable misched for R52.

2018-04-27 11:29:49 +00:00

crash-greedy-v6.ll

Replace "no-frame-pointer-*" function attributes with "frame-pointer"

2019-01-14 10:55:55 +00:00

crash-greedy.ll

Replace "no-frame-pointer-*" function attributes with "frame-pointer"

2019-01-14 10:55:55 +00:00

crash-O0.ll

Replace "no-frame-pointer-*" function attributes with "frame-pointer"

2019-01-14 10:55:55 +00:00

crash-on-pow2-shufflevector.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

crash-shufflevector.ll

…

crash.ll

Move the personality function from LandingPadInst to Function

2015-06-17 20:52:32 +00:00

crc32.ll

ARM: add test for crc32 instructions in CodeGen.

2015-01-14 01:43:33 +00:00

cse-call.ll

[ARM] Call setBooleanContents(ZeroOrOneBooleanContent)

2017-08-22 11:02:37 +00:00

cse-flags.ll

[SelectionDAG] CSE nodes with differing SDNodeFlags

2016-01-15 21:56:40 +00:00

cse-ldrlit.ll

[opaque pointer type] Add textual IR support for explicit type parameter to gep operator

2015-03-13 18:20:45 +00:00

cse-libcalls.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

ctor_order.ll

Unified logic for computing target ABI in backend and front end by moving this common code to Support/TargetParser.

2017-06-30 00:03:54 +00:00

ctors_dtors.ll

Unified logic for computing target ABI in backend and front end by moving this common code to Support/TargetParser.

2017-06-30 00:03:54 +00:00

cttz_vector.ll

[ARM] Regenerate cttz tests

2018-10-14 16:49:04 +00:00

cttz.ll

[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).

2017-06-28 07:07:03 +00:00

cxx-tlscc.ll

[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).

2017-06-28 07:07:03 +00:00

dag-combine-ldst.ll

Elide stores which are overwritten without being observed.

2017-05-16 19:43:56 +00:00

dagcombine-anyexttozeroext.ll

[ARM] ComputeKnownBits to handle extract vectors

2019-01-07 19:01:47 +00:00

dagcombine-concatvector.ll

[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions

2015-09-30 10:56:37 +00:00

darwin-eabi.ll

ARM: switch armv7em MachO triple to hard-float defaults and libcalls.

2018-07-19 12:44:51 +00:00

darwin-tls-preserved.ll

ARM: TLS calling convention doesn't preserve r9 or r12 on Darwin.

2017-04-19 18:07:54 +00:00

darwin-tls.ll

ARM: put extern __thread stubs in a special section.

2016-04-25 21:12:04 +00:00

data-in-code-annotations.ll

ARM & AArch64: make use of common cmpxchg idioms after expansion

2014-05-30 10:09:59 +00:00

dbg-range-extension.mir

Remove irrelevant references to legacy git repositories from

2019-01-15 16:18:52 +00:00

dbg.ll

ARM: Add patterns for dbg

2014-08-26 12:47:26 +00:00

DbgValueOtherTargets.test

…

debug-frame-large-stack.ll

Replace "no-frame-pointer-*" function attributes with "frame-pointer"

2019-01-14 10:55:55 +00:00

debug-frame-no-debug.ll

Replace "no-frame-pointer-*" function attributes with "frame-pointer"

2019-01-14 10:55:55 +00:00

debug-frame-vararg.ll

Replace "no-frame-pointer-*" function attributes with "frame-pointer"

2019-01-14 10:55:55 +00:00

debug-frame.ll

Replace "no-frame-pointer-*" function attributes with "frame-pointer"

2019-01-14 10:55:55 +00:00

debug-info-arg.ll

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

debug-info-blocks.ll

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

debug-info-branch-folding.ll

[ARM] preserve test intent by removing undef

2018-05-16 21:57:00 +00:00

debug-info-d16-reg.ll

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

debug-info-no-frame.ll

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

debug-info-qreg.ll

[ARM] make test immune to scalarization improvements; NFC

2018-12-14 18:47:04 +00:00

debug-info-s16-reg.ll

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

debug-info-sreg2.ll

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

debug-segmented-stacks.ll

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

debugtrap.ll

ARM: Use BKPT instead of TRAP to implement llvm.debugtrap.

2018-10-24 18:10:38 +00:00

default-float-abi.ll

Add support for musl-libc on ARM Linux.

2016-06-24 21:14:33 +00:00

default-reloc.ll

Fix default reloc model on ARM.

2016-05-28 10:41:15 +00:00

demanded-bits-and.ll

[ARM] Handle all-ones mask explicitly in targetShrinkDemandedConstant.

2018-08-22 20:13:45 +00:00

deprecated-asm.s

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

deps-fix.ll

Separate ExecutionDepsFix into 4 parts:

2018-01-22 10:05:23 +00:00

disable-fp-elim.ll

Replace "no-frame-pointer-*" function attributes with "frame-pointer"

2019-01-14 10:55:55 +00:00

disable-tail-calls.ll

Add explicit -mtriple=arm-unknown to llvm/test/CodeGen/ARM/disable-tail-calls.ll, to satisfy *-win32.

2015-06-09 23:33:25 +00:00

div.ll

[ARM] Add support for armv7ve triple in llvm (PR31358).

2017-02-09 23:29:14 +00:00

divmod-eabi.ll

ARM: use divmod libcalls on embedded MachO platforms too.

2017-05-08 20:00:14 +00:00

divmod-hwdiv.ll

[ARM] Check for correct HW div when lowering divmod

2017-04-18 08:32:27 +00:00

divmod.ll

ARM: use divmod libcalls on embedded MachO platforms too.

2017-05-08 20:00:14 +00:00

domain-conv-vmovs.ll

…

dsp-loop-indexing.ll

[LSR] Generate cross iteration indexes

2019-02-07 13:32:54 +00:00

dsp-mlal.ll

[ARM] Add codegen for SMMULR, SMMLAR and SMMLSR

2018-01-12 09:24:41 +00:00

dwarf-eh.ll

Emit smaller exception tables for non-SJLJ mode.

2018-02-09 17:13:37 +00:00

dwarf-unwind.ll

[ARM] Generate consistent frame records for Thumb2

2016-08-23 09:19:22 +00:00

dyn-stackalloc.ll

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

early-cfi-sections.ll

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

eh-dispcont.ll

[ARM] Fix registers clobbered by SjLj EH on soft-float targets

2016-10-11 10:06:59 +00:00

eh-resume-darwin.ll

ARMv7k: base ABI decision on v7k Arch rather than watchos OS.

2016-01-27 19:32:29 +00:00

ehabi-filters.ll

Move the personality function from LandingPadInst to Function

2015-06-17 20:52:32 +00:00

ehabi-handlerdata-nounwind.ll

Emit smaller exception tables for non-SJLJ mode.

2018-02-09 17:13:37 +00:00

ehabi-handlerdata.ll

Emit smaller exception tables for non-SJLJ mode.

2018-02-09 17:13:37 +00:00

ehabi-no-landingpad.ll

…

ehabi-unwind.ll

Replace "no-frame-pointer-*" function attributes with "frame-pointer"

2019-01-14 10:55:55 +00:00

ehabi.ll

Replace "no-frame-pointer-*" function attributes with "frame-pointer"

2019-01-14 10:55:55 +00:00

elf-lcomm-align.ll

…

emit-big-cst.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

emutls1.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

emutls_generic.ll

[MinGW] [ARM] Add stubs for potential automatic dllimported variables

2018-08-31 08:00:25 +00:00

emutls.ll

[TLS] use emulated TLS if the target supports only this mode

2018-02-28 17:48:55 +00:00

execute-only-big-stack-frame.ll

[ARM] Allow execute only code on Cortex-m23

2018-09-28 08:55:19 +00:00

execute-only-section.ll

[ARM] Allow execute only code on Cortex-m23

2018-09-28 08:55:19 +00:00

execute-only.ll

[ARM] Allow execute only code on Cortex-m23

2018-09-28 08:55:19 +00:00

expand-pseudos.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

extload-knownzero.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

extloadi1.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

fabs-neon.ll

Improved test cases that were added with r214892.

2014-08-05 20:16:35 +00:00

fabs-to-bfc.ll

Guard fabs to bfc convert with V6T2 flag

2016-01-13 00:03:35 +00:00

fabss.ll

…

fadds.ll

…

fast-isel-align.ll

Relax fast register allocator related test cases; NFC

2018-10-29 20:10:42 +00:00

fast-isel-binary.ll

Change the fast-isel-abort option from bool to int to enable "levels"

2015-02-27 18:32:11 +00:00

fast-isel-br-const.ll

Change the fast-isel-abort option from bool to int to enable "levels"

2015-02-27 18:32:11 +00:00

fast-isel-br-phi.ll

Change the fast-isel-abort option from bool to int to enable "levels"

2015-02-27 18:32:11 +00:00

fast-isel-call-multi-reg-return.ll

Change the fast-isel-abort option from bool to int to enable "levels"

2015-02-27 18:32:11 +00:00

fast-isel-call.ll

[FastISel] Disable local value sinking by default

2018-04-11 16:03:07 +00:00

fast-isel-cmp-imm.ll

[ARM] Use VCMP, not VCMPE, for floating point equality comparisons

2017-02-13 12:32:47 +00:00

fast-isel-conversion.ll

Change the fast-isel-abort option from bool to int to enable "levels"

2015-02-27 18:32:11 +00:00

fast-isel-crash2.ll

…

fast-isel-crash.ll

Change the fast-isel-abort option from bool to int to enable "levels"

2015-02-27 18:32:11 +00:00

fast-isel-deadcode.ll

ARM: stop emitting blx instructions for most calls on MachO.

2016-05-10 19:17:47 +00:00

fast-isel-ext.ll

Limit the range of processors supported by ARM fast isel to v6 or

2015-09-18 20:08:18 +00:00

fast-isel-fold.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

fast-isel-frameaddr.ll

[ARM] Generate consistent frame records for Thumb2

2016-08-23 09:19:22 +00:00

fast-isel-GEP-coalesce.ll

[opaque pointer type] Add textual IR support for explicit type parameter to gep operator

2015-03-13 18:20:45 +00:00

fast-isel-icmp.ll

Change the fast-isel-abort option from bool to int to enable "levels"

2015-02-27 18:32:11 +00:00

fast-isel-indirectbr.ll

Change the fast-isel-abort option from bool to int to enable "levels"

2015-02-27 18:32:11 +00:00

fast-isel-inline-asm.ll

[FastISel] Local values shouldn't be alive across an inline asm call with side effects.

2014-07-16 22:20:51 +00:00

fast-isel-intrinsic.ll

[FastISel] Disable local value sinking by default

2018-04-11 16:03:07 +00:00

fast-isel-ldr-str-arm.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

fast-isel-ldr-str-thumb-neg-index.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

fast-isel-ldrh-strh-arm.ll

Relax fast register allocator related test cases; NFC

2018-10-29 20:10:42 +00:00

fast-isel-load-store-verify.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

fast-isel-mvn.ll

[ARM] Define a subtarget feature that is used to avoid using movt/movw

2015-07-16 00:58:23 +00:00

fast-isel-pic.ll

Fix tests.

2015-10-26 20:49:49 +00:00

fast-isel-pie.ll

Use shouldAssumeDSOLocal.

2016-06-20 17:45:33 +00:00

fast-isel-pred.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

fast-isel-redefinition.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

fast-isel-remat-same-constant.ll

[Fast-ISel] Don't mark the first use of a remat constant as killed.

2015-05-09 00:51:03 +00:00

fast-isel-ret.ll

Change the fast-isel-abort option from bool to int to enable "levels"

2015-02-27 18:32:11 +00:00

fast-isel-select.ll

[FastISel] Disable local value sinking by default

2018-04-11 16:03:07 +00:00

fast-isel-shift-materialize.ll

MachO: trap unreachable instructions

2018-04-13 22:25:20 +00:00

fast-isel-shifter.ll

Change the fast-isel-abort option from bool to int to enable "levels"

2015-02-27 18:32:11 +00:00

fast-isel-static.ll

[ARM] Define a subtarget feature and use it to decide whether long calls should

2015-07-07 06:54:42 +00:00

fast-isel-update-valuemap-for-extract.ll

[Fast-ISel] Clear kill flags on registers replaced by updateValueMap.

2015-05-08 20:46:54 +00:00

fast-isel-vaddd.ll

[ARM] Fast-Isel was incorrectly selecting <2 x double> adds.

2015-05-06 16:39:17 +00:00

fast-isel-vararg.ll

[FastISel] Disable local value sinking by default

2018-04-11 16:03:07 +00:00

fast-isel.ll

Relax fast register allocator related test cases; NFC

2018-10-29 20:10:42 +00:00

fast-tail-call.ll

[ARM] Add B.W and CBZ instructions to ARMv8-M Baseline

2016-01-15 10:26:17 +00:00

fastcc-vfp.ll

…

fastisel-gep-promote-before-add.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

fastisel-thumb-litpool.ll

AsmPrinter: mark the beginning and the end of a function in verbose mode

2017-05-23 21:22:16 +00:00

fcmp-xo.ll

[ARM] Support float literals under XO

2018-03-28 10:02:26 +00:00

fcopysign.ll

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

fdivs.ll

…

fence-singlethread.ll

Enhance synchscope representation

2017-07-11 22:23:00 +00:00

fixunsdfdi.ll

…

flag-crash.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

float-helpers.s

[ARM][NFC] codegen tests cleanup: remove dangling check prefixes

2018-11-23 10:08:39 +00:00

floorf.ll

…

fmacs.ll

[ARM][NFCI] Do not fuse VADD and VMUL, continued (1/2)

2018-10-17 07:26:35 +00:00

fmdrr-fmrrd.ll

…

fmscs.ll

…

fmuls.ll

…

fnattr-trap.ll

llvm/test/CodeGen/ARM/fnattr-trap.ll: Add -mtriple, to appease targeting *-win32.

2015-07-03 08:21:38 +00:00

fnegs.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

fnmacs.ll

…

fnmscs.ll

[ARM] Add missing selection patterns for vnmla

2017-09-22 09:50:52 +00:00

fnmul.ll

easing the constraint for isNegatibleForFree and GetNegatedExpression

2018-06-14 20:54:13 +00:00

fnmuls.ll

…

fold-const.ll

…

fold-sext-sextload.ll

[ARM][NFC] Make tests immune to better div optimizations

2018-10-30 22:08:13 +00:00

fold-stack-adjust.ll

Replace "no-frame-pointer-*" function attributes with "frame-pointer"

2019-01-14 10:55:55 +00:00

fold-zext-zextload.ll

[ARM][NFC] Make tests immune to better div optimizations

2018-10-30 22:08:13 +00:00

formal.ll

…

fp16-args.ll

Do not ASSERTZEXT for i16 result of bitcast from f16 operand

2016-01-08 17:46:05 +00:00

fp16-frame-lowering.ll

[ARM] Fix FP16 stack loads/stores for Thumb2 with frame pointer

2019-03-01 14:20:28 +00:00

fp16-instructions.ll

[SchedModel] Fix for read advance cycles with implicit pseudo operands.

2018-10-30 15:04:40 +00:00

fp16-intrinsic-vector-1op.ll

[ARM] Support for v4f16 and v8f16 vectors

2018-03-19 13:35:25 +00:00

fp16-intrinsic-vector-2op.ll

[ARM] Support for v4f16 and v8f16 vectors

2018-03-19 13:35:25 +00:00

fp16-litpool2-arm.mir

[MIR] Add support for debug metadata for fixed stack objects

2018-04-25 18:58:06 +00:00

fp16-litpool3-arm.mir

MIR: Reject non-power-of-4 alignments in MMO parsing

2019-01-30 23:09:28 +00:00

fp16-litpool-arm.mir

Recommit: [ARM] f16 constant pool fix

2018-02-22 10:43:57 +00:00

fp16-litpool-thumb.mir

Recommit: [ARM] f16 constant pool fix

2018-02-22 10:43:57 +00:00

fp16-load-store.ll

[ARM] Fix selection of VLDR.16 instruction with imm offset

2019-03-04 09:17:38 +00:00

fp16-no-condition.ll

[ARM] Make fullfp16 instructions not conditionalisable.

2019-02-25 10:39:53 +00:00

fp16-promote.ll

[NFC] Rename minnan and maxnan to minimum and maximum

2018-10-24 22:49:55 +00:00

fp16-v3.ll

[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).

2017-06-28 07:07:03 +00:00

fp16-vld.ll

[ARM] FP16: support vld1.16 for vector loads with post-increment

2018-12-03 08:26:34 +00:00

fp16-vminmaxnm-safe.ll

[ARM] FP16 vmaxnm/vminnm scalar instructions

2018-04-13 15:34:26 +00:00

fp16-vminmaxnm-vector.ll

[ARM] FP16: support the vector vmin and vmax variants

2018-08-08 07:20:15 +00:00

fp16-vminmaxnm.ll

[ARM] FP16 vmaxnm/vminnm scalar instructions

2018-04-13 15:34:26 +00:00

fp16.ll

NFC - Various typo fixes in tests

2018-07-04 13:28:39 +00:00

fp_convert.ll

…

fp-arg-shuffle.ll

…

fp-fast.ll

…

fp-only-sp.ll

ARM: make sure FastISel bails on f64 operations for Cortex-M4.

2017-02-23 22:35:00 +00:00

fp.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

fparith.ll

[ARM] Fix up buildbots after r246360

2015-08-29 11:50:08 +00:00

fpcmp_ueq.ll

[ARM] Use VCMP, not VCMPE, for floating point equality comparisons

2017-02-13 12:32:47 +00:00

fpcmp-f64-neon-opt.ll

Do not emit intermediate register for zero FP immediate

2014-10-23 15:31:50 +00:00

fpcmp-opt.ll

[ARM] Prefer BIC over BFC in ARM mode.

2017-04-07 22:01:23 +00:00

fpcmp.ll

[ARM] Use VCMP, not VCMPE, for floating point equality comparisons

2017-02-13 12:32:47 +00:00

fpconsts.ll

…

fpconv.ll

[ARM] Tighten f64<->f16 conversion requirements

2018-09-12 16:24:43 +00:00

fpmem.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

fpoffset_overflow.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

fpow.ll

…

fpowi.ll

test: modernise ARM CodeGen tests

2016-12-27 18:35:19 +00:00

fpscr-intrinsics.ll

[ARM] Reapply r296865 "[ARM] fpscr read/write intrinsics not aware of each other""

2017-03-07 11:17:53 +00:00

fptoint.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

fpvcvtr.ll

[ARM] Add LLVM tests for the vcvtr builtins

2018-02-17 19:59:29 +00:00

frame-register.ll

Replace "no-frame-pointer-*" function attributes with "frame-pointer"

2019-01-14 10:55:55 +00:00

fsubs.ll

…

ftrunc.ll

[DAGCombine] (float)((int) f) --> ftrunc (PR36617)

2018-04-20 15:07:55 +00:00

func-argpassing-endian.ll

[DAGCombiner] Call SimplifyDemandedVectorElts from EXTRACT_VECTOR_ELT

2018-07-17 09:45:35 +00:00

fusedMAC.ll

[ARM] Do not fuse VADD and VMUL, continued (2/2)

2018-10-17 10:05:44 +00:00

gep-optimization.ll

[DAGCombiner] Fold together mul and shl when both are by a constant

2015-08-21 10:48:17 +00:00

ghc-tcreturn-lowered.ll

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

global-merge-1.ll

[GlobalMerge] Set the alignment on merged global structs

2018-06-06 14:48:32 +00:00

global-merge-addrspace.ll

Changed renaming of local symbols by inserting a dot vefore the numeric suffix.

2015-05-12 16:47:30 +00:00

global-merge-alignment.ll

[GlobalMerge] Set the alignment on merged global structs

2018-06-06 14:48:32 +00:00

global-merge-dllexport.ll

Use .set instead of = when printing assignment in assembly output

2018-03-27 16:44:41 +00:00

global-merge-external-2.ll

[GlobalMerge] Fix GlobalMerge on bss external global variables.

2018-08-30 00:49:50 +00:00

global-merge-external.ll

Use .set instead of = when printing assignment in assembly output

2018-03-27 16:44:41 +00:00

global-merge.ll

[GlobalMerge] Exit early if only one global is to be merged

2018-05-19 18:00:02 +00:00

globals.ll

[MC] Use .p2align instead of .align

2016-01-26 00:03:25 +00:00

gpr-paired-spill-thumbinst.ll

…

gpr-paired-spill.ll

In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.

2017-03-14 00:34:14 +00:00

gv-stubs-crash.ll

Move the personality function from LandingPadInst to Function

2015-06-17 20:52:32 +00:00

half.ll

[ARM] Tighten f64<->f16 conversion requirements

2018-09-12 16:24:43 +00:00

hardfloat_neon.ll

…

hello.ll

Replace "no-frame-pointer-*" function attributes with "frame-pointer"

2019-01-14 10:55:55 +00:00

hfa-in-contiguous-registers.ll

ARM: HFAs must be passed in consecutive registers

2014-05-09 14:01:47 +00:00

hidden-vis-2.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

hidden-vis-3.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

hidden-vis.ll

…

hints.ll

ARM: provide a new generic hint intrinsic

2014-04-25 17:24:24 +00:00

i1.ll

[ARM] Call setBooleanContents(ZeroOrOneBooleanContent)

2017-08-22 11:02:37 +00:00

iabs.ll

…

ifconv-kills.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

ifconv-regmask.ll

[opaque pointer type] Add textual IR support for explicit type parameter to gep operator

2015-03-13 18:20:45 +00:00

ifcvt1.ll

…

ifcvt2.ll

…

ifcvt3.ll

Re-commit r235560: Switch lowering: extract jump tables and bit tests before building binary tree (PR22262)

2015-04-23 16:45:24 +00:00

ifcvt4.ll

Codegen: Tail Merge: Be less aggressive with special cases.

2016-08-10 18:36:18 +00:00

ifcvt5.ll

[ARM] Generate consistent frame records for Thumb2

2016-08-23 09:19:22 +00:00

ifcvt6.ll

[ARM] Enable shrink-wrapping by default.

2015-11-18 00:40:54 +00:00

ifcvt7.ll

[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).

2017-06-28 07:07:03 +00:00

ifcvt8.ll

[ARM] Enable shrink-wrapping by default.

2015-11-18 00:40:54 +00:00

ifcvt9.ll

…

ifcvt10.ll

[ARM] preserve test intent by removing undef

2018-05-16 22:20:33 +00:00

ifcvt11.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

ifcvt12.ll

…

ifcvt_canFallThroughTo.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

ifcvt_diamond_unanalyzable.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

ifcvt_forked_diamond_unanalyzable.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

ifcvt_simple_bad_zero_prob_succ.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

ifcvt_simple_unanalyzable.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

ifcvt_triangleWoCvtToNextEdge.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

ifcvt-branch-weight-bug.ll

[CodeGen] Unify the syntax of MBB successors in MIR and -debug output

2018-02-09 00:10:31 +00:00

ifcvt-branch-weight.ll

[CodeGen] Unify the syntax of MBB successors in MIR and -debug output

2018-02-09 00:10:31 +00:00

ifcvt-callback.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

ifcvt-dead-def.ll

[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.

2017-12-07 10:40:31 +00:00

ifcvt-iter-indbr.ll

[CodeGen] Unify the syntax of MBB successors in MIR and -debug output

2018-02-09 00:10:31 +00:00

ifcvt-regmask-noreturn.ll

Fix IfConverter to handle regmask machine operands.

2015-05-05 22:09:41 +00:00

illegal-bitfield-loadstore.ll

[ARM] Adjust AND immediates to make them cheaper to select.

2018-08-10 21:21:53 +00:00

illegal-vector-bitcast.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

imm-peephole-arm.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

imm-peephole-thumb.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

imm.ll

…

immcost.ll

[ARM] ADD with a negative offset can become SUB for free

2016-09-09 13:35:36 +00:00

indexed-mem.ll

[DAGCombine] Enable more pre-indexed stores

2019-01-23 09:11:49 +00:00

indirect-hidden.ll

[CodeGen] Always use printReg to print registers in both MIR and debug

2017-11-30 16:12:24 +00:00

indirect-reg-input.ll

[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction

2015-02-27 19:29:02 +00:00

indirectbr-2.ll

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

indirectbr-3.ll

[IfConversion] Maintain the CFG when predicating/merging blocks in IfConvert*

2017-08-11 06:57:08 +00:00

indirectbr.ll

Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.

2018-06-20 22:01:04 +00:00

inline-asm-clobber.ll

Replace "no-frame-pointer-*" function attributes with "frame-pointer"

2019-01-14 10:55:55 +00:00

inline-diagnostics.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

inlineasm2.ll

…

inlineasm3.ll

[ARM] Skip inline asm memory operands in DAGToDAGISel

2016-07-20 09:48:24 +00:00

inlineasm4.ll

…

inlineasm-64bit.ll

Fix uninitialized read in ARM's PrintAsmOperand

2018-07-30 16:45:40 +00:00

inlineasm-error-t-toofewregs.ll

[ARM] Fix redirect in inline assembly test

2018-02-15 19:17:55 +00:00

inlineasm-global.ll

llvm/test/CodeGen/ARM/inlineasm-global.ll: Add explicit triple to appease targeting *-win32.

2014-07-25 09:55:01 +00:00

inlineasm-imm-arm.ll

…

inlineasm-imm-thumb2.ll

Add some testing for thumb1 and thumb2 inline asm immediate constraints

2016-01-08 00:34:44 +00:00

inlineasm-imm-thumb.ll

Add some testing for thumb1 and thumb2 inline asm immediate constraints

2016-01-08 00:34:44 +00:00

inlineasm-ldr-pseudo.ll

[ARM] Fixup tests to take into account mov translation. NFC.

2016-05-12 21:22:37 +00:00

inlineasm-operand-implicit-cast.ll

Support inline asm with multiple 64bit output in 32bit GPR

2018-08-08 09:35:26 +00:00

inlineasm-switch-mode-oneway-from-arm.ll

…

inlineasm-switch-mode-oneway-from-thumb.ll

Revert r265817

2016-04-08 18:15:37 +00:00

inlineasm-switch-mode.ll

Revert r265817

2016-04-08 18:15:37 +00:00

inlineasm-X-allocation.ll

[ARM][NFC] Fix test inlineasm-X-allocation.ll

2018-10-29 08:45:56 +00:00

inlineasm-X-constraint.ll

Pass the test file in through stdin instead of by filename.

2016-04-26 03:43:49 +00:00

inlineasm.ll

[ARM] Allow 64- and 128-bit types with 't' inline asm constraint

2018-02-15 14:44:22 +00:00

insn-sched1.ll

[ARM] Generate consistent frame records for Thumb2

2016-08-23 09:19:22 +00:00

int-to-fp.ll

…

integer_insertelement.ll

…

interrupt-attr.ll

ARM: use r7 as the frame-pointer on all MachO targets.

2016-04-11 22:27:40 +00:00

interval-update-remat.ll

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

interwork.ll

[ARM] Add ".code 32" to functions in the ARM instruction set

2016-09-13 12:18:15 +00:00

intrinsics-coprocessor.ll

[ARM] Avoid using ARM instructions in Thumb mode

2017-01-31 14:35:01 +00:00

intrinsics-crypto.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

intrinsics-memory-barrier.ll

[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction

2015-02-27 19:29:02 +00:00

intrinsics-overflow.ll

[ARM] Add some missing thumb1 opcodes to enable peephole optimisation of CMPs

2019-02-22 12:23:31 +00:00

intrinsics-v8.ll

ARM: remove @llvm.arm.sevl

2014-04-25 17:51:25 +00:00

invalid-target.ll

[ADT] Normalize empty triple components

2018-08-08 22:23:57 +00:00

invalidated-save-point.ll

[Improve CodeGen Testing] This patch renables MIRPrinter print fields which have value equal to its default.

2017-06-06 08:16:19 +00:00

invoke-donothing-assert.ll

Move the personality function from LandingPadInst to Function

2015-06-17 20:52:32 +00:00

isel-v8i32-crash.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

ispositive.ll

…

jump-table-islands-split.ll

ARM: recommit r237590: allow jump tables to be placed as constant islands.

2015-05-31 19:22:07 +00:00

jump-table-islands.ll

[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).

2017-06-28 07:07:03 +00:00

jump-table-tbh.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

jumptable-label.ll

ARM: recommit r237590: allow jump tables to be placed as constant islands.

2015-05-31 19:22:07 +00:00

krait-cpu-div-attribute.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

large-stack.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

large-vector.ll

ARM: don't try to over-align large vectors as arguments.

2018-05-03 12:54:25 +00:00

ldaex-stlex.ll

…

ldc2l.ll

[ARM] Add backend support for load/store intrinsics.

2016-05-31 12:39:30 +00:00

ldm-base-writeback.ll

[ARM] Transform LDMs into writeback form to save code size

2016-06-07 11:47:24 +00:00

ldm-stm-base-materialization.ll

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

ldm-stm-i256.ll

[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).

2017-06-28 07:07:03 +00:00

ldm.ll

[opaque pointer type] Add textual IR support for explicit type parameter to gep operator

2015-03-13 18:20:45 +00:00

ldr_ext.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

ldr_frame.ll

Fix some erroneous lit test failures due to unlucky name of working directory.

2016-02-17 16:35:18 +00:00

ldr_post.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

ldr_pre.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

ldr.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

ldrcppic.ll

[ARM] Add MemOperand to LDRcp to enable DCE.

2018-11-09 23:09:17 +00:00

ldrd-memoper.ll

[CodeGen] Use MIR syntax for MachineMemOperand printing

2018-03-14 21:52:13 +00:00

ldrd.ll

[ARM][NFC] codegen tests cleanup: remove dangling check prefixes

2018-11-23 10:08:39 +00:00

ldrex-frame-size.ll

ARM: fix Thumb2 CodeGen for ldrex with folded frame-index.

2018-09-07 09:21:25 +00:00

ldst-f32-2-i32.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

ldstrex-m.ll

ARM: use acquire/release instruction variants when available.

2018-12-17 15:05:32 +00:00

ldstrex.ll

ARM: fix Thumb2 CodeGen for ldrex with folded frame-index.

2018-09-07 09:21:25 +00:00

legalize-fneg.ll

[LegalizeTypes] Expand FNEG to bitwise op for IEEE FP types

2019-02-11 22:10:08 +00:00

legalize-unaligned-load.ll

Delete Default and JITDefault code models

2017-08-03 02:16:21 +00:00

lit.local.cfg

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00

litpool-licm.ll

[CodeGen] Always use printReg to print registers in both MIR and debug

2017-11-30 16:12:24 +00:00

load_i1_select.ll

[ARM] Allow CMPZ transforms even if the input has multiple uses.

2018-06-08 21:16:56 +00:00

load_store_multiple.ll

[ARM] Fix isRenamable flag setting on expanded VSTMDIA opcode.

2017-12-14 18:06:25 +00:00

load_store_opt_clobber_cpsr.mir

[CodeGen] Fix forward scan in MachineBasicBlock::computeRegisterLiveness.

2018-11-14 00:39:29 +00:00

load_store_opt_kill.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

load_store_opt_reg_limit.mir

[ARM][ARMLoadStoreOptimizer]

2018-09-24 10:42:22 +00:00

load-address-masked.ll

…

load-arm.ll

ARM: add extra test for addrmode folding.

2017-05-03 16:54:30 +00:00

load-combine-big-endian.ll

Fix a reoccuring typo in load-combine tests

2018-03-27 17:33:50 +00:00

load-combine.ll

Fix a reoccuring typo in load-combine tests

2018-03-27 17:33:50 +00:00

load-global2.ll

[arm] Fix Unnecessary reloads from GOT.

2017-11-13 20:45:38 +00:00

load-global.ll

ARM/ELF: Better codegen for global variable addresses.

2015-10-26 18:23:16 +00:00

load-store-flags.ll

[ARM] Modify codegen for memcpy intrinsic to prefer LDM/STM.

2015-10-05 14:49:54 +00:00

load.ll

[ARM] Use sub for negative offset load/store in thumb1

2019-01-29 10:40:31 +00:00

local-call.ll

[CodeGen] Always use printReg to print registers in both MIR and debug

2017-11-30 16:12:24 +00:00

log2_not_readnone.ll

…

long_shift.ll

[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).

2017-06-28 07:07:03 +00:00

long-setcc.ll

[ARM] Materialise some boolean values to avoid a branch

2018-02-16 09:23:59 +00:00

long.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

longMAC.ll

[ARM] Return true in enableMultipleCopyHints().

2018-02-16 09:51:01 +00:00

loop-align-cortex-m.ll

[LSR] Generate cross iteration indexes

2019-02-07 13:32:54 +00:00

loop-indexing.ll

[NFC][ARM] Simplify loop-indexing codegen test

2019-02-11 10:52:49 +00:00

loopvectorize_pr33804.ll

[LoopVectorizer] Add more testcases for PR33804.

2017-09-18 17:28:15 +00:00

lowerMUL-newload.ll

Regenerate test.

2019-01-07 12:21:13 +00:00

lsr-code-insertion.ll

ARM: override cost function to re-enable ConstantHoisting (& fix it).

2016-04-13 23:08:27 +00:00

lsr-icmp-imm.ll

[Thumb] Select (CMPZ X, -C) -> (CMPZ (ADDS X, C), 0)

2016-09-09 12:52:24 +00:00

lsr-scale-addr-mode.ll

[ARM] Assign cost of scaling for Cortex-R52

2016-10-18 09:08:54 +00:00

lsr-unfolded-offset.ll

[ARM] Generate consistent frame records for Thumb2

2016-08-23 09:19:22 +00:00

machine-copyprop.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

machine-cse-cmp.ll

[DAGCombiner] Teach DAG combiner that A-(B-C) can be folded to A+(C-B)

2018-07-28 00:27:25 +00:00

machine-licm.ll

Replace "no-frame-pointer-*" function attributes with "frame-pointer"

2019-01-14 10:55:55 +00:00

macho-embedded-float.ll

Fixed typos in tests: s/CEHCK/CHECK/

2019-02-25 13:12:33 +00:00

macho-extern-hidden.ll

Use isTargetMachO instead of isTargetDarwin.

2016-08-24 19:02:29 +00:00

macho-frame-offset.ll

Replace "no-frame-pointer-*" function attributes with "frame-pointer"

2019-01-14 10:55:55 +00:00

MachO-subtypes.ll

[ARM] Fix MachO CPU Subtype selection

2015-08-21 21:52:48 +00:00

macho-trap.ll

MachO: trap unreachable instructions

2018-04-13 22:25:20 +00:00

mature-mc-support.ll

[LLC] Add an inline assembly diagnostics handler.

2017-02-03 11:14:39 +00:00

mem.ll

…

memcpy-inline.ll

[CodeGen] Allow mempcy/memset to generate small overlapping stores.

2018-12-13 09:56:19 +00:00

memcpy-ldm-stm.ll

[CodeGen] Allow mempcy/memset to generate small overlapping stores.

2018-12-13 09:56:19 +00:00

memcpy-no-inline.ll

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

memfunc.ll

[IR] Allow increasing the alignment of dso-local globals.

2018-10-31 23:03:58 +00:00

memset-inline.ll

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

MergeConsecutiveStores.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

metadata-default.ll

IR: Make metadata typeless in assembly

2014-12-15 19:07:53 +00:00

metadata-short-enums.ll

IR: Make metadata typeless in assembly

2014-12-15 19:07:53 +00:00

metadata-short-wchar.ll

IR: Make metadata typeless in assembly

2014-12-15 19:07:53 +00:00

minmax.ll

[ARM] Add instruction selection patterns for vmin/vmax

2015-08-19 14:11:27 +00:00

minsize-call-cse.ll

[ARM] Prefer indirect calls in minsize mode

2016-07-15 07:55:21 +00:00

minsize-imms.ll

…

minsize-litpools.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

misched-copy-arm.ll

[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.

2017-12-07 10:40:31 +00:00

misched-fp-basic.ll

CodeGen: Rename DEBUG_TYPE to match passnames

2017-05-25 21:26:32 +00:00

misched-fusion-aes.ll

[DAGCombine] Improve alias analysis for chain of independent stores.

2018-11-08 19:14:20 +00:00

misched-fusion-lit.ll

[ARM] Add new target feature to fuse literal generation

2018-07-27 18:16:47 +00:00

misched-int-basic-thumb2.mir

[CodeGen] Always print register ties in MI::dump()

2018-09-26 13:33:09 +00:00

misched-int-basic.mir

[CodeGen] Always print register ties in MI::dump()

2018-09-26 13:33:09 +00:00

mls.ll

…

movcc-double.ll

DAGCombiner: Canonicalize select(and/or,x,y) depending on target.

2015-03-06 19:49:10 +00:00

movt-movw-global.ll

…

movt.ll

[ARM] Add Cortex-M35P

2019-02-26 12:02:12 +00:00

msr-it-block.ll

[ARM] Fix incorrect mask bits in MSR encoding for write_register intrinsic

2017-02-10 17:41:08 +00:00

mul_const.ll

…

mul.ll

…

mulhi.ll

…

mult-alt-generic-arm.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

mvn.ll

…

named-reg-alloc.ll

Re-commit of r238201 with fix for building with shared libraries.

2015-06-01 12:02:47 +00:00

named-reg-notareg.ll

Re-commit of r238201 with fix for building with shared libraries.

2015-06-01 12:02:47 +00:00

negate-i1.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

negative-offset.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

neon_arith1.ll

…

neon_cmp.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

neon_div.ll

ARM: fix vectorized division on WoA

2017-01-27 03:41:53 +00:00

neon_fpconv.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

neon_ld1.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

neon_ld2.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

neon_minmax.ll

[ARM] Fix crash when targetting CPU without NEON

2015-08-17 19:37:12 +00:00

neon_shift.ll

…

neon_spill.ll

[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions

2015-09-30 10:56:37 +00:00

neon_vabs.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

neon_vshl_minint.ll

When lowering vector shifts a check is performed to see if the value to shift by

2015-07-24 09:31:48 +00:00

neon-dot-product.ll

[ARM] Codegen for v8.2A dot product intrinsics

2018-04-27 12:50:40 +00:00

neon-fma.ll

…

neon-spfp.ll

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

neon-v8.1a.ll

[ARM] Add v8.1a "Rounding Double Multiply Add/Subtract" extension

2015-03-26 18:29:02 +00:00

nest-register.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

no_redundant_trunc_for_cmp.ll

DAG: avoid duplicated truncating for sign extended operand

2016-07-29 23:33:48 +00:00

no-arm-mode.ll

[ARM] Emit error when ARM exec mode is not available.

2017-08-09 15:39:10 +00:00

no-cfi.ll

Canonicalize the representation of empty an expression in DIGlobalVariableExpression

2017-08-30 18:06:51 +00:00

no-cmov2bfi.ll

[ARM] Fix computeKnownBits for ARMISD::CMOV

2017-03-23 16:47:47 +00:00

no-fpscr-liveness.ll

LiveIntervalAnalysis: Fix alias regunit reserved definition

2017-09-01 18:36:26 +00:00

no-fpu.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

no-tail-call.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

none-macho-v4t.ll

Fix thumbv4t indirect calls

2014-12-04 19:34:50 +00:00

none-macho.ll

Replace "no-frame-pointer-*" function attributes with "frame-pointer"

2019-01-14 10:55:55 +00:00

nonreserved-callframe-with-basereg.mir

ARM: use correct offset from base pointer (r6) in call frame regions.

2018-12-07 13:43:55 +00:00

noopt-dmb-v7.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

nop_concat_vectors.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

noreturn-csr-skip.mir

Reapply ARM: Do not spill CSR to stack on entry to noreturn functions

2018-04-07 10:57:03 +00:00

noreturn.ll

[ARM] Generate consistent frame records for Thumb2

2016-08-23 09:19:22 +00:00

null-streamer.ll

llvm-mc: Use Target::createNullStreamer to fix crashes on target-specific asm directives.

2015-02-19 00:45:04 +00:00

opt-shuff-tstore.ll

…

optimize-dmbs-v7.ll

[Target/ARM] Only enable OptimizeBarrierPass at -O1 and above.

2015-05-20 21:40:38 +00:00

optselect-regclass.ll

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

out-of-registers.ll

[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions

2015-09-30 10:56:37 +00:00

overflow-intrinsic-optimizations.ll

[ARM] Fix PR37382: Don't optimize mul.with.overflow on thumbv6m.

2018-07-02 21:05:26 +00:00

pack.ll

…

peephole-bitcast.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

peephole-phi.mir

Fixed typos in tests: s/CHEKC/CHECK/

2019-02-25 13:41:59 +00:00

pei-swiftself.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

phi.ll

Turn on -addr-sink-using-gep by default.

2017-04-06 22:42:18 +00:00

pic.ll

Don't print (PLT) on arm.

2016-06-16 16:09:53 +00:00

pie.ll

Add a use of shouldAssumeDSOLocal to ARM.

2016-05-31 15:31:55 +00:00

plt-relative-reloc.ll

CodeGen: Use PLT relocations for relative references to unnamed_addr functions.

2016-04-22 20:40:10 +00:00

popcnt.ll

[ARM][NEON] Improve vector popcnt lowering with PADDL (PR39281)

2018-10-15 13:20:41 +00:00

pow.75.ll

[DAGCombine] Optimize pow(X, 0.75) to sqrt(X) * sqrt(sqrt(X))

2019-02-08 19:50:58 +00:00

pow.ll

[DAGCombiner] try to convert pow(x, 0.25) to sqrt(sqrt(x))

2018-09-05 17:01:56 +00:00

pr3502.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

pr13249.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

pr18364-movw.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

pr25317.ll

[CodeGen] Always use printReg to print registers in both MIR and debug

2017-11-30 16:12:24 +00:00

pr25838.ll

[LivePhysRegs] Fix handling of return instructions.

2018-02-06 23:00:17 +00:00

pr26669.ll

[SjLjEHPrepare] Don't grab pointers to functions in doInitialization

2016-02-19 03:13:40 +00:00

pr32545.ll

[SDAG] Fix visitAND optimization to deal with vector extract case again.

2017-04-06 19:05:41 +00:00

pr32578.ll

Fixed typos in tests: s/CEHCK/CHECK/

2019-02-25 13:12:33 +00:00

pr34045-2.ll

[ARM] Use ADDCARRY / SUBCARRY

2017-12-11 12:13:45 +00:00

pr34045.ll

[ARM] Use ADDCARRY / SUBCARRY

2017-12-11 12:13:45 +00:00

pr35103.ll

[ARM] Use ADDCARRY / SUBCARRY

2017-12-11 12:13:45 +00:00

pr36577.ll

[DAGCombiner] form 'not' ops ahead of shifts (PR39657)

2018-11-22 19:24:10 +00:00

pr39060.ll

[ARM] Fix for PR39060

2018-09-26 10:56:00 +00:00

pr39571.ll

[DAGCombiner] Fix load-store forwarding of indexed loads.

2018-11-12 14:05:40 +00:00

PR15053.ll

…

PR32721_ifcvt_triangle_unanalyzable.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

PR35379.ll

[ARM] Fix PR35379 - incorrect unwind information when compiling with -Oz

2018-01-08 14:47:19 +00:00

preferred-align.ll

[CodeGen] Always use printReg to print registers in both MIR and debug

2017-11-30 16:12:24 +00:00

prefetch.ll

[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction

2015-02-27 19:29:02 +00:00

prera-ldst-aliasing.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

prera-ldst-insertpt.mir

[ARM] LoadStoreOptimizer: reoder limit

2019-02-11 09:37:42 +00:00

print-memb-operand.ll

[ARM] Enable changing instprinter's behavior based on the per-function

2015-03-27 23:41:42 +00:00

print-registers.ll

Fix "Q" and "R" inline assembly template modifiers for big-endian Arm

2018-08-30 10:28:23 +00:00

private.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

rbit.ll

[SelectionDAG] Add support for BITREVERSE constant folding

2017-01-16 13:39:00 +00:00

readcyclecounter.ll

…

readonly-aliases.ll

ARM: handle checking aliases with out-of-bounds GEPs

2018-10-24 00:00:52 +00:00

readtp.ll

Add newline to end of test file. NFC.

2017-09-14 14:48:59 +00:00

reg_sequence.ll

[ARM] preserve test intent by removing undef

2018-05-17 18:08:27 +00:00

register-scavenger-exceptions.mir

[CodeGen] Don't scavenge non-saved regs in exception throwing functions

2019-02-01 09:23:51 +00:00

regpair_hint_phys.ll

ARM: Handle physreg targets in RegPair hints gracefully

2015-04-03 00:18:38 +00:00

relax-per-target-feature.ll

[MC] Pass MCSubtargetInfo to fixupNeedsRelaxation and applyFixup

2018-06-06 09:40:06 +00:00

rem_crash.ll

llvm/test/CodeGen/ARM/rem_crash.ll: Avoid unsupported targets to specify explicit triple.

2016-03-03 22:38:39 +00:00

ret0.ll

…

ret_arg1.ll

…

ret_arg2.ll

…

ret_arg3.ll

…

ret_arg4.ll

…

ret_arg5.ll

…

ret_f32_arg2.ll

…

ret_f32_arg5.ll

…

ret_f64_arg2.ll

…

ret_f64_arg_reg_split.ll

…

ret_f64_arg_split.ll

…

ret_f64_arg_stack.ll

…

ret_i64_arg2.ll

…

ret_i64_arg3.ll

…

ret_i64_arg_split.ll

…

ret_i128_arg2.ll

…

ret_sret_vector.ll

…

ret_void.ll

…

returned-ext.ll

Revert "Disable this-return argument forwarding on ARM/AArch64"

2016-07-20 04:13:01 +00:00

returned-trunc-tail-calls.ll

…

rev.ll

The automatic CHECK: to CHECK-LABEL: conversion, back in 2013,

2017-02-25 15:17:16 +00:00

ror.ll

[DAGCombiner] visitRotate patch to optimize pair of ROTR/ROTL instructions into one with combined shift operand.

2017-07-05 17:55:42 +00:00

rotate.ll

[ARM] Expand ROTL and ROTR of vector value types

2015-10-27 10:25:20 +00:00

sat-to-bitop.ll

[ARM] Lower lower saturate to 0 and lower saturate to -1 using bit-operations

2018-02-28 17:13:07 +00:00

saxpy10-a9.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

sbfx.ll

ARM: spot SBFX-compatbile code expressed with sign_extend_inreg

2014-07-23 13:59:12 +00:00

scavenging.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

sched-it-debug-nodes.mir

MachineOperand/MIParser: Do not print debug-use flag, infer it

2018-10-30 23:28:27 +00:00

sdiv-pow2-arm-size.ll

[ARM] Don't expand sdiv when optimising for minsize

2018-11-30 08:14:28 +00:00

sdiv-pow2-thumb-size.ll

[ARM] Don't expand sdiv when optimising for minsize

2018-11-30 08:14:28 +00:00

section-name.ll

Bring r226038 back.

2015-01-19 15:16:06 +00:00

section.ll

…

segmented-stacks-dynamic.ll

Fix ARMv4 support

2017-08-28 20:20:47 +00:00

segmented-stacks.ll

[X86,ARM] Retain split-stack prolog check for sibling calls

2018-06-26 14:11:30 +00:00

select_const.ll

[ARM] Adjust AND immediates to make them cheaper to select.

2018-08-10 21:21:53 +00:00

select_xform.ll

[ARM] Return true in enableMultipleCopyHints().

2018-02-16 09:51:01 +00:00

select-imm.ll

[ARM] Add missing pseudo-instruction for Thumb1 RSBS.

2018-10-31 21:45:48 +00:00

select-undef.ll

…

select.ll

ARM: use target-specific SUBS node when combining cmp with cmov.

2018-12-03 11:16:21 +00:00

setcc-logic.ll

[DAGCombiner] allow hoisting vector bitwise logic ahead of truncates

2018-12-16 14:57:04 +00:00

setcc-type-mismatch.ll

ARM & AArch64: teach LowerVSETCC that output type size may differ from input.

2015-02-08 00:50:47 +00:00

setjmp_longjmp.ll

[ARM] Restore the right frame pointer register in Int_eh_sjlj_longjmp

2017-09-28 19:04:30 +00:00

shift_minsize.ll

[SelectionDAG] Codesize: don't expand SHIFT to SHIFT_PARTS

2019-01-31 08:07:30 +00:00

shift-combine.ll

NFC - Various typo fixes in tests

2018-07-04 13:28:39 +00:00

shift-i64.ll

[ARM] Expand long shifts for Thumb1 to __aeabi_ calls

2018-01-24 18:00:57 +00:00

shifter_operand.ll

ARM: don't mangle DAG constant if it has more than one use

2016-01-29 19:18:46 +00:00

shuffle.ll

Replace "no-frame-pointer-*" function attributes with "frame-pointer"

2019-01-14 10:55:55 +00:00

sincos.ll

[TargetLowering] Android has sincos functions

2018-09-18 13:18:21 +00:00

single-issue-r52.mir

[CodeGen] Use MIR syntax for MachineMemOperand printing

2018-03-14 21:52:13 +00:00

sjlj-prepare-critical-edge.ll

ARM: stop emitting blx instructions for most calls on MachO.

2016-05-10 19:17:47 +00:00

sjljeh-swifterror.ll

SjLjEHPrepare: Don't reg-to-mem swifterror values

2018-03-14 15:44:07 +00:00

sjljehprepare-lower-empty-struct.ll

[ARM] Fix SJLJ exception handling when manually chosen on a platform where it isn't default

2017-09-28 19:04:14 +00:00

smlad0.ll

[ARM] Prevent parallel macs for unsigned values

2018-11-26 10:22:55 +00:00

smlad1.ll

Revert r344693 ("[ARM] bottom-top mul support in ARMParallelDSP")

2018-10-18 19:34:30 +00:00

smlad2.ll

Revert r344693 ("[ARM] bottom-top mul support in ARMParallelDSP")

2018-10-18 19:34:30 +00:00

smlad3.ll

Revert r344693 ("[ARM] bottom-top mul support in ARMParallelDSP")

2018-10-18 19:34:30 +00:00

smlad4.ll

Revert r344693 ("[ARM] bottom-top mul support in ARMParallelDSP")

2018-10-18 19:34:30 +00:00

smlad5.ll

Revert r344693 ("[ARM] bottom-top mul support in ARMParallelDSP")

2018-10-18 19:34:30 +00:00

smlad6.ll

Revert r344693 ("[ARM] bottom-top mul support in ARMParallelDSP")

2018-10-18 19:34:30 +00:00

smlad7.ll

Revert r344693 ("[ARM] bottom-top mul support in ARMParallelDSP")

2018-10-18 19:34:30 +00:00

smlad8.ll

Revert r344693 ("[ARM] bottom-top mul support in ARMParallelDSP")

2018-10-18 19:34:30 +00:00

smlad9.ll

Revert r344693 ("[ARM] bottom-top mul support in ARMParallelDSP")

2018-10-18 19:34:30 +00:00

smlad10.ll

Revert r344693 ("[ARM] bottom-top mul support in ARMParallelDSP")

2018-10-18 19:34:30 +00:00

smlad11.ll

Revert r344693 ("[ARM] bottom-top mul support in ARMParallelDSP")

2018-10-18 19:34:30 +00:00

smlad12.ll

Revert r344693 ("[ARM] bottom-top mul support in ARMParallelDSP")

2018-10-18 19:34:30 +00:00

smladx-1.ll

Revert r344693 ("[ARM] bottom-top mul support in ARMParallelDSP")

2018-10-18 19:34:30 +00:00

smlald0.ll

[ARM] Prevent parallel macs for unsigned values

2018-11-26 10:22:55 +00:00

smlald1.ll

Revert r344693 ("[ARM] bottom-top mul support in ARMParallelDSP")

2018-10-18 19:34:30 +00:00

smlald2.ll

[ARM] Prevent parallel macs for unsigned values

2018-11-26 10:22:55 +00:00

smlaldx-1.ll

Revert r344693 ("[ARM] bottom-top mul support in ARMParallelDSP")

2018-10-18 19:34:30 +00:00

smlaldx-2.ll

Revert r344693 ("[ARM] bottom-top mul support in ARMParallelDSP")

2018-10-18 19:34:30 +00:00

smml.ll

[ARM][NFC] codegen tests cleanup: remove dangling check prefixes

2018-11-23 10:08:39 +00:00

smul.ll

[ARM] Add missing patterns for DSP muls

2019-01-08 10:12:36 +00:00

softfp-fabs-fneg.ll

[ARM][NFC] codegen tests cleanup: remove dangling check prefixes

2018-11-23 10:08:39 +00:00

space-directive.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

special-reg-acore.ll

Re-commit of r238201 with fix for building with shared libraries.

2015-06-01 12:02:47 +00:00

special-reg-mcore.ll

[ARM] Fix incorrect mask bits in MSR encoding for write_register intrinsic

2017-02-10 17:41:08 +00:00

special-reg-v8m-base.ll

[ARM] Add new system registers to ARMv8-M Baseline/Mainline

2016-01-25 11:25:36 +00:00

special-reg-v8m-main.ll

[ARM] Unify handling of M-Class system registers

2017-07-19 12:57:16 +00:00

special-reg.ll

Re-commit of r238201 with fix for building with shared libraries.

2015-06-01 12:02:47 +00:00

spill-q.ll

[ARM] preserve test intent by removing undef

2018-05-16 22:20:11 +00:00

splitkit.ll

SplitKit: Fix liveness recomputation in some remat cases.

2018-02-02 00:08:19 +00:00

ssat-lower.ll

Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions for Thumb2

2015-12-20 06:41:44 +00:00

ssat-upper.ll

Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions for Thumb2

2015-12-20 06:41:44 +00:00

ssat-v4t.ll

[ARM] Saturation instructions are DSP-only

2016-07-25 22:25:25 +00:00

ssat.ll

[ARM] Saturation instructions are DSP-only

2016-07-25 22:25:25 +00:00

ssp-data-layout.ll

Replace "no-frame-pointer-*" function attributes with "frame-pointer"

2019-01-14 10:55:55 +00:00

stack_guard_remat.ll

Add address space mangling to lifetime intrinsics

2017-04-10 20:18:21 +00:00

stack-alignment.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

stack-frame.ll

…

stack-protector-bmovpcb_call.ll

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

stack-size-section.ll

Recommit r335333 "[MC] - Add .stack_size sections into groups and link them with .text"

2018-06-22 10:53:47 +00:00

stackpointer.ll

IR: Make metadata typeless in assembly

2014-12-15 19:07:53 +00:00

static-addr-hoisting.ll

In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.

2017-03-14 00:34:14 +00:00

stc2.ll

[ARM] Add backend support for load/store intrinsics.

2016-05-31 12:39:30 +00:00

stm.ll

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

str_post.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

str_pre-2.ll

Unified logic for computing target ABI in backend and front end by moving this common code to Support/TargetParser.

2017-06-30 00:03:54 +00:00

str_pre.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

str_trunc.ll

…

struct_byval_arm_t1_t2.ll

[ARM] Return true in enableMultipleCopyHints().

2018-02-16 09:51:01 +00:00

struct_byval.ll

ARM: stop emitting blx instructions for most calls on MachO.

2016-05-10 19:17:47 +00:00

struct-byval-frame-index.ll

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

sub-cmp-peephole.ll

DAG combiner: fold (select, C, X, undef) -> X

2018-11-16 23:13:38 +00:00

sub.ll

[ARM] Add v8m.base pattern for add negative imm

2019-02-11 11:35:42 +00:00

subreg-remat.ll

Replace "no-frame-pointer-*" function attributes with "frame-pointer"

2019-01-14 10:55:55 +00:00

subtarget-features-long-calls.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

subtarget-no-movt.ll

[ARM] Thumb2: ConstantMaterializationCost

2019-01-31 08:38:06 +00:00

swift-atomics.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

swift-ios.ll

Swift Calling Convention: swiftcc for ARM.

2016-04-05 22:44:44 +00:00

swift-return.ll

More swift calling convention tests

2016-10-28 17:21:05 +00:00

swift-vldm.ll

ARM: Introduce conservative load/store optimization mode

2016-03-02 19:20:00 +00:00

swifterror.ll

[FastISel] Disable local value sinking by default

2018-04-11 16:03:07 +00:00

swiftself.ll

[ARM/AArch ISel] SwiftCC: First parameters that are marked swiftself are not 'this returns'

2017-02-08 22:30:47 +00:00

switch-minsize.ll

[SDAGBuilder] Don't create a binary tree for switches in minsize mode

2016-09-08 13:12:22 +00:00

sxt_rot.ll

[ARM] Improve sxta{b|h} and uxta{b|h} tests

2016-08-10 09:34:34 +00:00

t2-imm.ll

…

t2-shrink-ldrpost.ll

[ARM] Shrink post-indexed LDR and STR to LDM/STM

2016-06-07 12:13:34 +00:00

t2abs-killflags.ll

Don't always apply kill flag in thumb2 ABS pseudo expansion.

2015-04-30 22:15:59 +00:00

tail-call-builtin.ll

Revert "CodeGen: ensure that libcalls are always AAPCS CC"

2016-09-07 03:17:19 +00:00

tail-call-float.ll

[ARM] Relax restriction on variadic functions for tailcall optimization

2016-11-17 10:56:58 +00:00

tail-call-weak.ll

ARM: stop emitting blx instructions for most calls on MachO.

2016-05-10 19:17:47 +00:00

tail-call.ll

[CodeGen] Enable tail calls for functions with NonNull attributes.

2018-09-26 10:46:18 +00:00

tail-dup-bundle.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

tail-dup-kill-flags.ll

Clear kill flags in tail duplication.

2015-05-07 21:48:26 +00:00

tail-dup.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

tail-merge-branch-weight.ll

[CodeGen] Unify the syntax of MBB successors in MIR and -debug output

2018-02-09 00:10:31 +00:00

tail-opts.ll

[BranchFolding] Tail common all identical unreachable blocks

2017-02-14 21:02:24 +00:00

tailcall-mem-intrinsics.ll

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

taildup-branch-weight.ll

[CodeGen] Unify the syntax of MBB successors in MIR and -debug output

2018-02-09 00:10:31 +00:00

test-sharedidx.ll

Scaling up values in ARMBaseInstrInfo::isProfitableToIfCvt() before they are scaled by a probability to avoid precision issue.

2015-09-18 18:19:40 +00:00

this-return.ll

Revert "Disable this-return argument forwarding on ARM/AArch64"

2016-07-20 04:13:01 +00:00

thread_pointer.ll

test: modernise ARM CodeGen tests

2016-12-27 18:35:19 +00:00

thumb1_return_sequence.ll

[ARM] Fix an off-by-one error when restoring LR for 16-bit Thumb

2017-11-27 10:13:14 +00:00

thumb1-div.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

thumb1-ldst-opt.ll

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

thumb1-varalloc.ll

ARM: stop emitting blx instructions for most calls on MachO.

2016-05-10 19:17:47 +00:00

thumb2-it-block.ll

[NFC] Use stdin for some tests instead of positional argument.

2017-06-29 14:51:54 +00:00

thumb2-size-opt.ll

ARM: check alignment before transforming ldr -> ldm (or similar).

2016-09-19 09:11:09 +00:00

thumb2-size-reduction-internal-flags.ll

Commute the internal flag on MachineOperands.

2015-04-30 23:14:14 +00:00

thumb_indirect_calls.ll

Fix CHECK directives that weren't checking.

2015-08-31 21:10:35 +00:00

thumb-alignment.ll

[MC] Use .p2align instead of .align

2016-01-26 00:03:25 +00:00

thumb-big-stack.ll

[ARM][TEST] Strengthen test against smarter reg alloc.

2015-05-01 00:45:55 +00:00

thumb-litpool.ll

[CodeGen] Always use printReg to print registers in both MIR and debug

2017-11-30 16:12:24 +00:00

thumb-stub.ll

Avoid a load for local functions.

2016-06-01 21:57:11 +00:00

tls1.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

tls2.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

tls3.ll

test: modernise ARM CodeGen tests

2016-12-27 18:35:19 +00:00

tls-models.ll

[ARM][NFC] codegen tests cleanup: remove dangling check prefixes

2018-11-23 10:08:39 +00:00

trap-unreachable.ll

[CodeGen] Add a -trap-unreachable option for debugging

2018-02-12 11:06:27 +00:00

trap.ll

ARM: Use BKPT instead of TRAP to implement llvm.debugtrap.

2018-10-24 18:10:38 +00:00

trunc_ldr.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

truncstore-dag-combine.ll

Fix some erroneous lit test failures due to unlucky name of working directory.

2016-02-17 16:35:18 +00:00

tst_teq.ll

…

twoaddrinstr.ll

[SchedModel] Fix for read advance cycles with implicit pseudo operands.

2018-10-30 15:04:40 +00:00

uint64tof64.ll

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

umulo-32.ll

[ARM] make test immune to improvements in undef simplification

2018-11-18 16:49:42 +00:00

umulo-64-legalisation-lowering.ll

[SelectionDAG] Improve the legalisation lowering of UMULO.

2018-08-16 18:39:39 +00:00

umulo-128-legalisation-lowering.ll

[SelectionDAG] Improve the legalisation lowering of UMULO.

2018-08-16 18:39:39 +00:00

unaligned_load_store_vector.ll

ARM: be conservative when asked load/store alignment of weird type.

2018-05-21 12:43:54 +00:00

unaligned_load_store_vfp.ll

ARM: make sure VFP loads and stores are properly aligned.

2015-10-26 21:32:53 +00:00

unaligned_load_store.ll

[ARM] Define subtarget feature strict-align.

2015-07-28 22:44:28 +00:00

undef-sext.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

undefined.ll

ARM: introduce llvm.arm.undefined intrinsic

2014-05-22 04:46:46 +00:00

unfold-shifts.ll

[ARM] and, or, xor and add with shl combine

2017-11-02 10:43:10 +00:00

unord.ll

…

unsafe-fsub.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

unschedule-first-call.ll

[ScheduleDAG] Don't schedule node with physical register interference

2017-08-01 00:28:40 +00:00

unwind-fp.ll

[ARM] Fix unwind information for floating point registers

2018-09-19 13:25:31 +00:00

unwind-init.ll

…

urem-opt-size.ll

[ARM] Code size optimisation to lower udiv+urem to udiv+mls instead of a

2016-10-03 10:12:32 +00:00

usat-lower.ll

Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions for Thumb2

2015-12-20 06:41:44 +00:00

usat-upper.ll

Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions for Thumb2

2015-12-20 06:41:44 +00:00

usat-v4t.ll

[ARM] Saturation instructions are DSP-only

2016-07-25 22:25:25 +00:00

usat.ll

[ARM] Lower unsigned saturation to USAT

2017-12-20 11:13:57 +00:00

useaa.ll

[ARM] Enable useAA() for the in-order Cortex-R52

2018-06-21 15:48:29 +00:00

uxt_rot.ll

[ARM] Improve sxta{b|h} and uxta{b|h} tests

2016-08-10 09:34:34 +00:00

uxtb.ll

test: modernise ARM CodeGen tests

2016-12-27 18:35:19 +00:00

v1-constant-fold.ll

…

v6-jumptable-clobber.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

v6m-smul-with-overflow.ll

Fix signed multiplication with overflow fallback.

2017-04-26 13:41:43 +00:00

v6m-umul-with-overflow.ll

DAG: correctly legalize UMULO.

2017-06-20 15:01:38 +00:00

v7k-abi-align.ll

[ARM] Generate consistent frame records for Thumb2

2016-08-23 09:19:22 +00:00

v7k-libcalls.ll

[ARM] Use aapcs_vfp for ___truncdfhf2 on v7k.

2016-06-24 00:08:01 +00:00

v7k-sincos.ll

ARM: stop emitting blx instructions for most calls on MachO.

2016-05-10 19:17:47 +00:00

v8m-tail-call.ll

[ARM] Avoid spilling lr with Thumb1 tail calls.

2018-08-08 20:03:10 +00:00

v8m.base-jumptable_alignment.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

va_arg.ll

[ARM] Prefer BIC over BFC in ARM mode.

2017-04-07 22:01:23 +00:00

vaba.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

vabd.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

vabs.ll

[ARM][NEON] Add support for ISD::ABS lowering

2017-05-08 10:37:34 +00:00

vadd.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

vararg_no_start.ll

ARM / x86_64 varargs: Don't save regparms in prologue without va_start

2014-08-22 21:59:26 +00:00

varargs-spill-stack-align-nacl.ll

ARM: simplify and extend byval handling

2015-03-11 18:54:22 +00:00

vargs_align.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

vargs.ll

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

vbits.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

vbsl-constant.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

vbsl.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

vceq.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

vcge.ll

[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions

2015-09-30 10:56:37 +00:00

vcgt.ll

[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).

2017-06-28 07:07:03 +00:00

vcmp-crash.ll

[ARM] Fix crash caused by r294945

2017-02-13 17:18:00 +00:00

vcnt.ll

[ARM] Expand vector ctlz_zero_undef so it becomes ctlz.

2016-04-26 05:04:37 +00:00

vcombine.ll

[SchedModel] Fix for read advance cycles with implicit pseudo operands.

2018-10-30 15:04:40 +00:00

vcvt_combine.ll

[CodeGen] Always use printReg to print registers in both MIR and debug

2017-11-30 16:12:24 +00:00

vcvt-cost.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

vcvt-v8.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

vcvt.ll

[LegalizeVectorTypes][X86][ARM][AArch64][PowerPC] Don't use SplitVecOp_TruncateHelper for FP_TO_SINT/UINT.

2018-11-26 21:12:39 +00:00

vdiv_combine.ll

[CodeGen] Always use printReg to print registers in both MIR and debug

2017-11-30 16:12:24 +00:00

vdup.ll

[DAGCombiner] Remove reduceBuildVecConvertToConvertBuildVec and rely on the vectorizers instead (PR35732)

2018-11-02 11:06:18 +00:00

vector-DAGCombine.ll

[LegalizeVectorTypes] Don't use SplitVecOp_TruncateHelper if we're heading towards scalarizing the type.

2018-11-23 02:32:13 +00:00

vector-extend-narrow.ll

[ARM][NFC] Make tests immune to better div optimizations

2018-10-30 22:08:13 +00:00

vector-load.ll

[DAGCombiner] Set the right SDLoc on a newly-created zextload (1/N)

2018-05-01 19:26:15 +00:00

vector-promotion.ll

Don't conditionalize Neon instructions, even in IT blocks.

2017-06-22 12:11:38 +00:00

vector-spilling.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

vector-store.ll

ARM: handle post-indexed NEON ops where the offset isn't the access width.

2017-04-20 19:54:02 +00:00

vext.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

vfcmp.ll

[ARM][NFC] Replaced tab characters in test file vfcmp.ll.

2018-08-07 08:05:15 +00:00

vfloatintrinsics.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

vfp-libcalls.ll

ARM: stop emitting blx instructions for most calls on MachO.

2016-05-10 19:17:47 +00:00

vfp-reg-stride.ll

[ARM] Replace processor check with feature

2018-08-09 16:13:24 +00:00

vfp-regs-dwarf.ll

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

vfp.ll

[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).

2017-06-28 07:07:03 +00:00

vget_lane.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

vhadd.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

vhsub.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

vicmp-64.ll

Improve ARM lowering for "icmp <2 x i64> eq".

2016-10-18 21:03:40 +00:00

vicmp.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

virtregrewriter-subregliveness.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

vld1.ll

[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).

2017-06-28 07:07:03 +00:00

vld2.ll

[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).

2017-06-28 07:07:03 +00:00

vld3.ll

[ARM] Fix codegen for VLD3/VLD4/VST3/VST4 with WB

2018-03-02 13:02:55 +00:00

vld4.ll

[ARM] Fix codegen for VLD3/VLD4/VST3/VST4 with WB

2018-03-02 13:02:55 +00:00

vld-vst-upgrade.ll

[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions

2015-09-30 10:56:37 +00:00

vlddup.ll

[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).

2017-06-28 07:07:03 +00:00

vldlane.ll

[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).

2017-06-28 07:07:03 +00:00

vldm-liveness.ll

[ARM] Check correct instructions for load/store rescheduling.

2017-03-01 22:56:20 +00:00

vldm-liveness.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

vldm-sched-a9.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

vminmax.ll

[CodeGen] Teach LLVM how to lower @llvm.{min,max}num to {MIN,MAX}NAN

2016-04-14 07:13:24 +00:00

vminmaxnm-safe.ll

[ARM] Rejig vmax tests a bit

2015-08-13 17:28:16 +00:00

vminmaxnm.ll

Generate FMINNAN/FMINNUM/FMAXNAN/FMAXNUM from SDAGBuilder.

2015-08-17 07:13:10 +00:00

vmla.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

vmls.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

vmov.ll

[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions

2015-09-30 10:56:37 +00:00

vmul.ll

[ARM] Add ARMISD::VLD1DUP to match vld1_dup more consistently.

2016-12-16 18:44:08 +00:00

vneg.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

vpadal.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

vpadd.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

vpminmax.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

vqadd.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

vqdmul.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

vqshl.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

vqshrn.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

vqsub.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

vrec.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

vrev.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

vrint.ll

[NEON] Support intrinsic for scalar and vector versions of the VRINTN instruction

2018-04-13 12:45:12 +00:00

vsel-fp16.ll

[ARM] Fix select_cc lowering for fp16

2019-03-05 10:42:34 +00:00

vsel.ll

[ARM] Consider undefined-on-NaN conditions in checkVSELConstraints

2019-03-01 13:58:25 +00:00

vselect_imax.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

vshift.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

vshiftins.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

vshl.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

vshll.ll

[SelectionDAG] Teach simplifyDemandedBits to handle shifts by constant splat vectors

2017-09-25 19:26:08 +00:00

vshrn.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

vsra.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

vst1.ll

[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).

2017-06-28 07:07:03 +00:00

vst2.ll

[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions

2015-09-30 10:56:37 +00:00

vst3.ll

[ARM] Fix codegen for VLD3/VLD4/VST3/VST4 with WB

2018-03-02 13:02:55 +00:00

vst4.ll

[ARM] Fix codegen for VLD3/VLD4/VST3/VST4 with WB

2018-03-02 13:02:55 +00:00

vstlane.ll

[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).

2017-06-28 07:07:03 +00:00

vsub.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

vtbl.ll

[ARM] Use TableGen patterns to select vtbl. NFC.

2017-04-19 20:39:39 +00:00

vtrn.ll

[ARM][NFC] Replaced tab-characters in test file vtrn.ll

2018-08-08 14:42:11 +00:00

vuzp.ll

[SchedModel] Fix for read advance cycles with implicit pseudo operands.

2018-10-30 15:04:40 +00:00

vzip.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

warn-stack.ll

[ARM] Generate consistent frame records for Thumb2

2016-08-23 09:19:22 +00:00

weak2.ll

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

weak.ll

…

wide-compares.ll

[ARM] Fix CPSR liveness in tMOVCCr_pseudo lowering.

2018-11-07 21:08:13 +00:00

widen-vmovs.ll

[ARM] Do not test for CPUs, use SubtargetFeatures. Also remove 2 flags.

2016-07-06 11:22:11 +00:00

wrong-t2stmia-size-opt.ll

ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2

2015-07-21 00:18:59 +00:00

xray-armv6-attribute-instrumentation.ll

[XRay][CodeGen] Use PIC-friendly code in XRay sleds and remove synthetic references in .text

2017-09-04 05:34:58 +00:00

xray-armv7-attribute-instrumentation.ll

[XRay][CodeGen] Use PIC-friendly code in XRay sleds and remove synthetic references in .text

2017-09-04 05:34:58 +00:00

xray-tail-call-sled.ll

[xray] Add XRay support for Mach-O in CodeGen

2016-11-23 02:07:04 +00:00

zero-cycle-zero.ll

[LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC.

2016-04-19 23:51:52 +00:00

zext-logic-shift-load.ll

[DAGCombiner] Fold (zext (and/or/xor (shl/shr (load x), cst), cst))

2018-04-07 23:36:10 +00:00

zextload_demandedbits.ll

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00