Nikita Popov 29ba81ded0 [ValueTracking] More accurate unsigned sub overflow detection ...

Second part of D58593.

Compute precise overflow conditions based on all known bits, rather
than just the sign bits. Unsigned a - b overflows iff a < b, and we
can determine whether this always/never happens based on the minimal
and maximal values achievable for a and b subject to the known bits
constraint.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355109 91177308-0d34-0410-b5e6-96231b3b80d8

2019-02-28 18:04:20 +00:00

..

already-vectorized.ll

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assume.ll

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avx1.ll

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avx512.ll

[X86] Add support for passing 'prefer-vector-width' function attribute into X86Subtarget and exposing via X86's getRegisterWidth TTI interface.

2018-01-20 00:26:08 +00:00

consecutive-ptr-cg-bug.ll

[SCEV] Smart range calculation for SCEVUnknown Phis

2018-03-01 06:56:48 +00:00

consecutive-ptr-uniforms.ll

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constant-fold.ll

[LV] Do not create SCEVs on broken IR in emitTransformedIndex. PR39160

2018-10-08 05:46:29 +00:00

constant-vector-operand.ll

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conversion-cost.ll

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cost-model.ll

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float-induction-x86.ll

[SimplifyCFG] use pass options and remove the latesimplifycfg pass

2017-10-28 18:43:07 +00:00

force-ifcvt.ll

Introduce llvm.loop.parallel_accesses and llvm.access.group metadata.

2018-12-20 04:58:07 +00:00

fp32_to_uint32-cost-model.ll

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fp64_to_uint32-cost-model.ll

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fp_to_sint8-cost-model.ll

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funclet.ll

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gather_scatter.ll

[ValueTracking] Look through casts when determining non-nullness

2019-01-26 23:40:35 +00:00

gather-cost.ll

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gather-vs-interleave.ll

[X86][LoopVectorize] Replace -mcpu=skylake-avx512 with -mattr=avx512f in some tests that failed when experimenting with defaulting to -mprefer-vector-width=256 for skylake-avx512.

2018-12-01 01:38:44 +00:00

gcc-examples.ll

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illegal-parallel-loop-uniform-write.ll

[LoopVectorize] auto-generate complete checks; NFC

2018-12-18 22:23:04 +00:00

imprecise-through-phis.ll

[CostModel][X86] Add explicit vector select costs

2019-01-20 13:55:01 +00:00

int128_no_gather.ll

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interleaving.ll

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invariant-load-gather.ll

[X86][LoopVectorize] Replace -mcpu=skylake-avx512 with -mattr=avx512f in some tests that failed when experimenting with defaulting to -mprefer-vector-width=256 for skylake-avx512.

2018-12-01 01:38:44 +00:00

invariant-store-vectorization.ll

[X86][LoopVectorize] Replace -mcpu=skylake-avx512 with -mattr=avx512f in some tests that failed when experimenting with defaulting to -mprefer-vector-width=256 for skylake-avx512.

2018-12-01 01:38:44 +00:00

lit.local.cfg

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masked_load_store.ll

[ValueTracking] More accurate unsigned sub overflow detection

2019-02-28 18:04:20 +00:00

max-mstore.ll

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metadata-enable.ll

[LV] Preserve inbounds on created GEPs

2018-05-01 15:35:08 +00:00

min-trip-count-switch.ll

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mul_slm_16bit.ll

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no_fpmath_with_hotness.ll

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

no_fpmath.ll

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

no-vector.ll

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optsize.ll

[LV] Avoid vectorizing loops under opt for size that involve SCEV checks

2018-11-02 09:16:12 +00:00

parallel-loops-after-reg2mem.ll

Introduce llvm.loop.parallel_accesses and llvm.access.group metadata.

2018-12-20 04:58:07 +00:00

parallel-loops.ll

Introduce llvm.loop.parallel_accesses and llvm.access.group metadata.

2018-12-20 04:58:07 +00:00

powof2div.ll

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pr23997.ll

[X86][CET] Changing -fcf-protection behavior to comply with gcc (LLVM part)

2018-05-18 11:58:25 +00:00

pr34438.ll

Introduce llvm.loop.parallel_accesses and llvm.access.group metadata.

2018-12-20 04:58:07 +00:00

pr35432.ll

Revert "[SCEV][NFC] Check NoWrap flags before lexicographical comparison of SCEVs"

2018-08-27 21:41:37 +00:00

pr36524.ll

Revert r325687 (workaround for PR36032).

2018-03-22 22:04:39 +00:00

pr39160.ll

[LV] Move test for r343954 into x86 subdirectory

2018-10-09 22:40:04 +00:00

propagate-metadata.ll

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ptr-indvar-crash.ll

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rauw-bug.ll

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reduction-crash.ll

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reduction-small-size.ll

[LV] Ignore the cost of values that will not appear in the vectorized loop

2017-12-12 08:57:43 +00:00

redundant-vf2-cost.ll

Move redundant-vf2-cost.ll test to X86 directory

2018-06-15 18:46:03 +00:00

reg-usage-debug.ll

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

reg-usage.ll

[LV] Avoid computing the register usage for default VF. NFC

2017-09-13 19:35:45 +00:00

register-assumption.ll

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scatter_crash.ll

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slm-no-vectorize.ll

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small-size.ll

[LV] Fold tail by masking to vectorize loops of arbitrary trip count under opt for size

2018-10-18 15:03:15 +00:00

strided_load_cost.ll

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struct-store.ll

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svml-calls-finite.ll

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svml-calls.ll

[TargetLibraryInfo] add mappings from LLVM sin/cos intrinsics to SVML calls

2018-06-07 18:21:24 +00:00

tripcount.ll

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uint64_to_fp64-cost-model.ll

[CostModel][X86] Add realistic vXi64 uitofp vXf64 costs

2018-10-25 13:06:20 +00:00

uniform_load.ll

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uniform-phi.ll

[LV] First order recurrence phis should not be treated as uniform

2018-09-04 22:12:23 +00:00

uniformshift.ll

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unroll_selection.ll

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unroll-pm.ll

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unroll-small-loops.ll

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veclib-calls.ll

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vect.omp.force.ll

Introduce llvm.loop.parallel_accesses and llvm.access.group metadata.

2018-12-20 04:58:07 +00:00

vect.omp.force.small-tc.ll

Refactor setAlreadyUnrolled() and setAlreadyVectorized().

2019-02-11 19:45:44 +00:00

vector_max_bandwidth.ll

Introduce llvm.loop.parallel_accesses and llvm.access.group metadata.

2018-12-20 04:58:07 +00:00

vector_ptr_load_store.ll

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vector-scalar-select-cost.ll

[CostModel][X86] Add explicit vector select costs

2019-01-20 13:55:01 +00:00

vectorization-remarks-loopid-dbg.ll

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

vectorization-remarks-missed.ll

[Unroll/UnrollAndJam/Vectorizer/Distribute] Add followup loop attributes.

2018-12-12 17:32:52 +00:00

vectorization-remarks-profitable.ll

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

vectorization-remarks.ll

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

vectorize-only-for-real.ll

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x86_fp80-vector-store.ll

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x86-interleaved-accesses-masked-group.ll

[LV] Support vectorization of interleave-groups that require an epilog under

2018-10-31 09:57:56 +00:00

x86-pr39099.ll

[IAI,LV] Avoid creating interleave-groups for predicated accesse

2018-10-07 06:57:25 +00:00

x86-predication.ll

[LV] Introduce VPBlendRecipe, VPWidenMemoryInstructionRecipe

2017-11-14 12:09:30 +00:00