Files
archived-llvm/test/CodeGen
Cameron Zwarich 92efda7e91 Merge information about the number of zero, one, and sign bits of live-out registers
at phis. This enables us to eliminate a lot of pointless zexts during the DAGCombine
phase. This fixes <rdar://problem/8760114>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126170 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-22 00:46:27 +00:00
..
2011-02-12 14:40:33 +00:00
2011-02-11 02:59:08 +00:00
2011-01-20 08:34:58 +00:00