Tim Northover 4841e615e3 GlobalISel: translate memcpy intrinsics. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284525 91177308-0d34-0410-b5e6-96231b3b80d8

2016-10-18 20:03:45 +00:00

..

AArch64

GlobalISel: translate memcpy intrinsics.

2016-10-18 20:03:45 +00:00

AMDGPU

[AMDGPU] Mark .note section SHF_ALLOC so lld creates a segment for it

2016-10-17 22:40:15 +00:00

ARM

[ARM] Assign cost of scaling for Cortex-R52

2016-10-18 09:08:54 +00:00

AVR

[RegAllocGreedy] Attempt to split unspillable live intervals

2016-10-11 01:04:36 +00:00

BPF

Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."

2016-10-13 20:23:25 +00:00

Generic

llc: Add -start-before/-stop-before options

2016-09-23 21:46:02 +00:00

Hexagon

Handle lane masks in LivePhysRegs when adding live-ins

2016-10-12 22:53:41 +00:00

Inputs

…

Lanai

Add a REQUIRES: assert on a Lanai test that uses a -debug-only flag

2016-07-29 19:35:22 +00:00

Mips

[mips][FastISel] Instantiate the MipsFastISel class only for targets that support FastISel.

2016-10-18 13:05:42 +00:00

MIR

AMDGPU/SI: Handle s_getreg hazard in GCNHazardRecognizer

2016-10-15 00:58:14 +00:00

MSP430

Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."

2016-10-13 20:23:25 +00:00

NVPTX

[NVPTX] Added intrinsics for atom.gen.{sys|cta}.* instructions.

2016-09-28 17:25:38 +00:00

PowerPC

PowerPC: specify full triple to avoid different Darwin asm syntax.

2016-10-14 21:25:29 +00:00

SPARC

This pass, fixing an erratum in some LEON 2 processors ensures that the SDIV instruction is not issued, but replaced by SDIVcc instead, which does not exhibit the error. Unit test included.

2016-10-10 08:53:06 +00:00

SystemZ

Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."

2016-10-13 20:23:25 +00:00

Thumb

Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."

2016-10-13 20:23:25 +00:00

Thumb2

Re-land "[Thumb] Save/restore high registers in Thumb1 pro/epilogues"

2016-10-11 21:14:03 +00:00

WebAssembly

Codegen: Tail-duplicate during placement.

2016-10-11 20:36:43 +00:00

WinEH

Revert EH-specific checks in BranchFolding that were causing blow ups in compile time.

2016-07-27 17:55:33 +00:00

X86

[X86][SSE] Added vector lshr/shl combine tests

2016-10-18 19:28:12 +00:00

XCore

Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."

2016-10-13 20:23:25 +00:00