Sam Kolton 5188cfa18e [TableGen] Add EncoderMethod to RegisterOperand ...

Reviewers: stoklund, grosbach, vpykhtin

Differential Revision: https://reviews.llvm.org/D32493

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303044 91177308-0d34-0410-b5e6-96231b3b80d8

2017-05-15 10:13:07 +00:00

..

GlobalISel

[globalisel][tablegen] Add several GINodeEquiv's for operators that do not require additional support.

2017-05-04 14:24:50 +00:00

CostTable.h

[modules] Add missing include.

2016-08-19 08:30:42 +00:00

GenericOpcodes.td

[GlobalISel] Translate shufflevector

2017-03-21 08:44:13 +00:00

Target.td

[TableGen] Add EncoderMethod to RegisterOperand

2017-05-15 10:13:07 +00:00

TargetCallingConv.h

Elide argument copies during instruction selection

2017-03-01 21:42:00 +00:00

TargetCallingConv.td

Swift Calling Convention: add swifterror attribute.

2016-04-01 21:41:15 +00:00

TargetFrameLowering.h

Target: Remove unused entities.

2016-10-09 04:38:57 +00:00

TargetInstrInfo.h

Add extra operand to CALLSEQ_START to keep frame part set up previously

2017-05-09 13:35:13 +00:00

TargetIntrinsicInfo.h

GlobalISel: support translation of intrinsic calls.

2016-07-29 22:32:36 +00:00

TargetItinerary.td

Fix comment typos. NFC.

2016-11-20 13:47:59 +00:00

TargetLowering.h

[PPC] Move the combine "a << (b % (sizeof(a) * 8)) -> (PPCshl a, b)" to the backend. NFC.

2017-05-12 19:25:37 +00:00

TargetLoweringObjectFile.h

[Target, Transforms] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).

2017-01-18 00:57:48 +00:00

TargetMachine.h

Revert "Feature generic option to setup start/stop-after/before"

2017-04-01 01:26:24 +00:00

TargetOpcodes.def

[XRay] Custom event logging intrinsic

2017-05-08 05:45:21 +00:00

TargetOpcodes.h

[GlobalISel] Don't RegBankSelect target-specific instructions.

2016-08-02 11:41:16 +00:00

TargetOptions.h

Remove stale and unused (MC)TargetOptions comparators.

2017-03-24 12:50:45 +00:00

TargetRegisterInfo.h

Move value type list from TargetRegisterClass to TargetRegisterInfo

2017-04-24 19:51:12 +00:00

TargetSchedule.td

Fix comment typos.

2017-05-08 15:33:08 +00:00

TargetSelectionDAG.td

Add extra operand to CALLSEQ_START to keep frame part set up previously

2017-05-09 13:35:13 +00:00

TargetSubtargetInfo.h

This patch closes PR#32216: Better testing of schedule model instruction latencies/throughputs.

2017-04-14 07:44:23 +00:00