Nikita Popov afafc1c7d5 [InstCombine] Relax cttz/ctlz with select on zero ...

The cttz/ctlz intrinsics have a parameter specifying whether the
result is undefined for zero. cttz(x, false) can be relaxed to
cttz(x, true) if x is known non-zero, and in fact such an optimization
is already performed. However, this currently doesn't work if x is
non-zero as a result of a select rather than an explicit branch.
This patch adds handling for this case, thus allowing
x != 0 ? cttz(x, false) : y to simplify to x != 0 ? cttz(x, true) : y.

Differential Revision: https://reviews.llvm.org/D55786

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350463 91177308-0d34-0410-b5e6-96231b3b80d8

2019-01-05 09:48:16 +00:00

..

CMakeLists.txt

InstCombine/AMDGPU: Add dimension-aware image intrinsics to SimplifyDemanded

2018-06-21 13:37:31 +00:00

InstCombineAddSub.cpp

[InstCombine] name change: foldShuffledBinop -> foldVectorBinop; NFC

2018-10-03 15:20:58 +00:00

InstCombineAndOrXor.cpp

[CmpInstAnalysis] fix function signature for ICmp code to predicate; NFC

2018-12-04 18:53:27 +00:00

InstCombineCalls.cpp

[X86][SSE] Auto upgrade PADDS/PSUBS intrinsics to SADD_SAT/SSUB_SAT generic intrinsics (llvm)

2018-12-21 09:04:14 +00:00

InstCombineCasts.cpp

[InstCombine] reduce raw IR narrowing rotate patterns to funnel shift

2019-01-04 17:38:12 +00:00

InstCombineCompares.cpp

[InstCombine] Simplify cttz/ctlz + icmp eq/ne into mask check

2018-12-18 19:59:50 +00:00

InstCombineInternal.h

[InstCombine] add helper for icmp with dominator; NFC

2018-12-04 15:35:17 +00:00

InstCombineLoadStoreAlloca.cpp

[IR] Add Instruction::isLifetimeStartOrEnd, NFC

2018-12-21 21:49:40 +00:00

InstCombineMulDivRem.cpp

[InstCombine] canonicalize MUL with NEG operand

2019-01-01 01:09:20 +00:00

InstCombinePHI.cpp

Introduce llvm.loop.parallel_accesses and llvm.access.group metadata.

2018-12-20 04:58:07 +00:00

InstCombineSelect.cpp

[InstCombine] Relax cttz/ctlz with select on zero

2019-01-05 09:48:16 +00:00

InstCombineShifts.cpp

[InstCombine] Ensure nested shifts are in range (OSS-Fuzz #9880)

2018-11-06 11:28:22 +00:00

InstCombineSimplifyDemanded.cpp

[InstCombine][AMDGPU] Handle more buffer intrinsics

2018-12-20 10:08:18 +00:00

InstCombineTables.td

InstCombine/AMDGPU: Add dimension-aware image intrinsics to SimplifyDemanded

2018-06-21 13:37:31 +00:00

InstCombineVectorOps.cpp

[InstCombine] refactor isCheapToScalarize(); NFC

2018-12-18 19:07:38 +00:00

InstructionCombining.cpp

[InstCombine] don't widen an arbitrary sequence of vector ops (PR40032)

2018-12-17 20:27:43 +00:00

LLVMBuild.txt

Update libdeps since TLI was moved from Target to Analysis in r226078.

2015-01-15 05:21:00 +00:00