Files
archived-llvm/test/CodeGen/PowerPC/unal4-std.ll
Ehsan Amiri 6ff814c730 [PPC] Enable transformations in PPCPassConfig::addIRPasses at O2
http://reviews.llvm.org/D18562

A large number of testcases has been modified so they pass after this test.
One testcase is deleted, because I realized even after undoing the original
change that was committed with this testcase, the testcase still passes. So
I removed it. The change to one other testcase (test/CodeGen/PowerPC/pr25802.ll)
is an arbitrary change to keep it passing. Given the original intention of the
testcase, and the fact that fixing it will require some time to change the testcase,
we concluded that this quick change will be enough.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265683 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 15:30:55 +00:00

25 lines
1.0 KiB
LLVM

; RUN: llc < %s -mcpu=pwr7 -mattr=-vsx| FileCheck %s
; RUN: llc < %s -mcpu=pwr7 -mattr=+vsx | FileCheck -check-prefix=CHECK-VSX %s
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
define void @copy_to_conceal(<8 x i16>* %inp) #0 {
entry:
store <8 x i16> zeroinitializer, <8 x i16>* %inp, align 2
br label %if.end210
if.end210: ; preds = %entry
ret void
; This will generate two align-1 i64 stores. Make sure that they are
; indexed stores and not in r+i form (which require the offset to be
; a multiple of 4).
; CHECK: @copy_to_conceal
; CHECK: stdx {{[0-9]+}}, 0,
; CHECK-VSX: @copy_to_conceal
; CHECK-VSX: stxvw4x {{[0-9]+}}, 0,
}
attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }