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archived-llvm/test/CodeGen/SystemZ
Jonas Paulsson 96e27952a5 [SystemZ] Pass regalloc hints to help Load-and-Test transformations.
Since there is no "Load-and-Test-High" instruction, the 32 bit load of a
register to be compared with 0 can only be implemented with LT if the virtual
GRX32 register ends up in a low part (GR32 register).

This patch detects these cases and passes the GR32 registers (low parts) as
(soft) hints in getRegAllocationHints().

Review: Ulrich Weigand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354935 91177308-0d34-0410-b5e6-96231b3b80d8
2019-02-27 00:18:28 +00:00
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