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archived-llvm/test/CodeGen/SystemZ/fp-cmp-07.mir
Francis Visoiu Mistrih e6b89910eb [CodeGen] Always use printReg to print registers in both MIR and debug
output

As part of the unification of the debug format and the MIR format,
always use `printReg` to print all kinds of registers.

Updated the tests using '_' instead of '%noreg' until we decide which
one we want to be the default one.

Differential Revision: https://reviews.llvm.org/D40421

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319445 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-30 16:12:24 +00:00

45 lines
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# RUN: llc -mtriple=s390x-linux-gnu -mcpu=z10 -no-integrated-as -start-after=block-placement %s -o - | FileCheck %s
# Test that LTEBR is used without an unnecessary LER
--- |
define float @f15(float %val, float %dummy, float* %dest) {
entry:
call void asm sideeffect "blah $0", "{f2}"(float %val)
%cmp = fcmp olt float %val, 0.000000e+00
br i1 %cmp, label %exit, label %store
store: ; preds = %entry
store float %val, float* %dest
br label %exit
exit: ; preds = %store, %entry
ret float %val
}
...
# CHECK: ltebr %f2, %f0
---
name: f15
tracksRegLiveness: true
liveins:
- { reg: '%f0s', virtual-reg: '' }
- { reg: '%r2d', virtual-reg: '' }
body: |
bb.0.entry:
liveins: %f0s, %r2d
LTEBRCompare %f0s, %f0s, implicit-def %cc
%f2s = LER %f0s
INLINEASM $"blah $0", 1, 9, %f2s
CondReturn 15, 4, implicit %f0s, implicit %cc
bb.1.store:
liveins: %f0s, %r2d
STE %f0s, killed %r2d, 0, %noreg :: (store 4 into %ir.dest)
Return implicit %f0s
...