Oliver Stannard 8a4fa4a92d [AArch64][v8.5A] Don't create BR instructions in outliner when BTI enabled ...

When branch target identification is enabled, we can only do indirect
tail-calls through x16 or x17. This means that the outliner can't
transform a BLR instruction at the end of an outlined region into a BR.

Differential revision: https://reviews.llvm.org/D52869



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343969 91177308-0d34-0410-b5e6-96231b3b80d8

2018-10-08 14:12:08 +00:00

..

GlobalISel

[GlobalIsel] Add llvm.invariant.start and llvm.invariant.end

2018-10-05 21:02:46 +00:00

128bit_load_store.ll

[LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC.

2016-04-19 23:51:52 +00:00

a57-csel.ll

[CodeGenPrepare] Remove load-based heuristic

2016-02-25 00:23:27 +00:00

aarch64_f16_be.ll

[AArch64][GlobalISel] Enable GlobalISel at -O0 by default

2018-01-02 16:30:47 +00:00

aarch64_tree_tests.ll

Partial revert of "NFC - Various typo fixes in tests"

2018-07-05 08:42:16 +00:00

aarch64_win64cc_vararg.ll

[AArch64] Rewrite stack frame handling for win64 vararg functions

2017-08-01 21:13:54 +00:00

aarch64-2014-08-11-MachineCombinerCrash.ll

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

aarch64-2014-12-02-combine-soften.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

aarch64-a57-fp-load-balancing.ll

[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.

2017-12-07 10:40:31 +00:00

aarch64-address-type-promotion-assertion.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

aarch64-address-type-promotion.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

aarch64-addv.ll

Re-commit r302678, fixing PR33053.

2017-05-16 21:29:22 +00:00

aarch64-be-bv.ll

[AArch64] Updated bigendian buildvector tests

2018-07-13 09:25:32 +00:00

aarch64-codegen-prepare-atp.ll

[CodeGenPrep] move aarch64-type-promotion to CGP

2017-04-03 19:20:07 +00:00

aarch64-combine-fmul-fsub.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

aarch64-DAGCombine-findBetterNeighborChains-crash.ll

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

aarch64-dynamic-stack-layout.ll

[PEI, AArch64] Use empty spaces in stack area for local stack slot allocation.

2016-06-02 16:22:07 +00:00

aarch64-fix-cortex-a53-835769.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

aarch64-fold-lslfast.ll

Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"

2018-02-27 16:59:10 +00:00

aarch64-gep-opt.ll

Turn on -addr-sink-using-gep by default.

2017-04-06 22:42:18 +00:00

aarch64-insert-subvector-undef.ll

[AArch64] add missing pattern for insert_subvector undef

2018-03-07 22:07:13 +00:00

aarch64-loop-gep-opt.ll

[AArch64] Use LateSimplifyCFG after expanding atomic operations.

2017-10-03 22:39:24 +00:00

aarch64-minmaxv.ll

Re-commit r302678, fixing PR33053.

2017-05-16 21:29:22 +00:00

aarch64-named-reg-w18.ll

[AArch64] Reserve x18 register on Fuchsia

2018-04-01 23:44:04 +00:00

aarch64-named-reg-x18.ll

[AArch64] Reserve x18 register on Fuchsia

2018-04-01 23:44:04 +00:00

aarch64-neon-v1i1-setcc.ll

…

aarch64-smax-constantfold.ll

[DAGCombine] Truncate BUILD_VECTOR operators if necessary when constant folding vectors

2015-09-10 10:34:34 +00:00

aarch64-smull.ll

AArch64: allow MOV (imm) alias to be printed

2016-06-16 01:42:25 +00:00

aarch64-stp-cluster.ll

[CodeGen] Use MIR syntax for MachineMemOperand printing

2018-03-14 21:52:13 +00:00

aarch64-tbz.ll

Re-apply r267206 with a fix for the encoding problem: when the immediate of

2016-04-25 20:54:08 +00:00

aarch64-tryBitfieldInsertOpFromOr-crash.ll

AArch64: use correct SDValue # when looking for bitfield placement.

2016-07-05 18:02:57 +00:00

aarch64-vcvtfp2fxs-combine.ll

[AArch64] PR28877: Don't assume we're running after legalization when creating vcvtfp2fxs

2016-08-08 13:13:57 +00:00

aarch64-vector-pcs.mir

[AArch64] Implement aarch64_vector_pcs codegen support.

2018-09-12 12:10:22 +00:00

aarch64-vuzp.ll

[x86][aarch64] ask the backend whether it has a vector blend instruction

2018-03-09 14:29:21 +00:00

aarch64-wide-shuffle.ll

…

aarch-multipart.ll

Fix an overly aggressive assertion in getCopyFromPartsVector.

2015-07-02 23:23:52 +00:00

adc.ll

…

addcarry-crash.ll

Fix addcarry-crash.ll

2017-06-01 14:24:31 +00:00

addsub_ext.ll

[AArch64] Improve add/sub/cmp isel of uxtw forms.

2016-09-26 15:34:47 +00:00

addsub-shifted.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

addsub.ll

Revert "CodeGen: Allow small copyable blocks to "break" the CFG."

2017-01-11 19:55:19 +00:00

alloca.ll

[LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC.

2016-04-19 23:51:52 +00:00

analyze-branch.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

analyzecmp.ll

[SimplifyCFG] Be more aggressive

2015-02-13 10:48:30 +00:00

and-mask-removal.ll

[AArch64][GlobalISel] Enable GlobalISel at -O0 by default

2018-01-02 16:30:47 +00:00

and-sink.ll

[CodeGenPrepare] Sink and duplicate more 'and' instructions.

2017-02-21 18:53:14 +00:00

andandshift.ll

NFC - Various typo fixes in tests

2018-07-04 13:28:39 +00:00

argument-blocks.ll

In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.

2017-03-14 00:34:14 +00:00

arm64-2011-03-09-CPSRSpill.ll

…

arm64-2011-03-17-AsmPrinterCrash.ll

Canonicalize the representation of empty an expression in DIGlobalVariableExpression

2017-08-30 18:06:51 +00:00

arm64-2011-03-21-Unaligned-Frame-Index.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-2011-04-21-CPSRBug.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

arm64-2011-10-18-LdStOptBug.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

arm64-2012-01-11-ComparisonDAGCrash.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-2012-05-07-DAGCombineVectorExtract.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-2012-05-07-MemcpyAlignBug.ll

[AArch64] Gangup loads and stores for pairing.

2018-05-16 15:36:52 +00:00

arm64-2012-05-09-LOADgot-bug.ll

…

arm64-2012-05-22-LdStOptBug.ll

[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.

2017-12-07 10:40:31 +00:00

arm64-2012-06-06-FPToUI.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-2012-07-11-InstrEmitterBug.ll

[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction

2015-02-27 19:29:02 +00:00

arm64-2013-01-13-ffast-fcmp.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-2013-01-23-frem-crash.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-2013-01-23-sext-crash.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-2013-02-12-shufv8i8.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-aapcs-be.ll

[AArch64] Combine callee-save and local stack SP adjustment instructions.

2016-05-06 16:34:59 +00:00

arm64-aapcs.ll

[DAGCombiner] Set the right SDLoc on a newly-created zextload (1/N)

2018-05-01 19:26:15 +00:00

arm64-abi_align.ll

[FastISel] Disable local value sinking by default

2018-04-11 16:03:07 +00:00

arm64-abi-varargs.ll

[DAG] Teach findBaseOffset to interpret indexes of indexed memory operations

2018-01-26 16:51:27 +00:00

arm64-abi.ll

[AArch64][GlobalISel] Enable GlobalISel at -O0 by default

2018-01-02 16:30:47 +00:00

arm64-addp.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-addr-mode-folding.ll

NFC - Various typo fixes in tests

2018-07-04 13:28:39 +00:00

arm64-addr-type-promotion.ll

Revert "[AArch64] Coalesce Copy Zero during instruction selection"

2018-06-21 16:05:24 +00:00

arm64-addrmode.ll

Reland r329956, "AArch64: Introduce a DAG combine for folding offsets into addresses.", with a fix for the bot failure.

2018-04-23 19:09:34 +00:00

arm64-AdvSIMD-Scalar.ll

Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"

2018-02-27 16:59:10 +00:00

arm64-alloc-no-stack-realign.ll

[AArch64] Add load/store pair instructions to getMemOpBaseRegImmOfsWidth().

2016-04-15 18:09:10 +00:00

arm64-alloca-frame-pointer-offset.ll

[AArch64] Use FP to access the emergency spill slot

2018-04-10 11:29:40 +00:00

arm64-andCmpBrToTBZ.ll

Tests: Add branch weights to non-layout tests.

2016-07-29 18:09:25 +00:00

arm64-ands-bad-peephole.ll

[AArch64] Register passes so they can be run by llc

2016-08-01 05:56:57 +00:00

arm64-AnInfiniteLoopInDAGCombine.ll

GlobalISel: rename legalizer components to match others.

2016-10-14 22:18:18 +00:00

arm64-anyregcc-crash.ll

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

arm64-anyregcc.ll

[StackMaps] Increase the size of the "location size" field

2017-04-28 04:48:42 +00:00

arm64-arith-saturating.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-arith.ll

[DAGCombiner] When combining zero_extend of a truncate, only mask before extending for vectors.

2018-03-01 22:32:25 +00:00

arm64-arm64-dead-def-elimination-flag.ll

[AArch64] Register passes so they can be run by llc

2016-08-01 05:56:57 +00:00

arm64-atomic-128.ll

Revert r329611, "AArch64: Allow offsets to be folded into addresses with ELF."

2018-04-10 16:19:30 +00:00

arm64-atomic.ll

Fix some misc. -enable-var-scope violations

2017-11-13 01:47:52 +00:00

arm64-basic-pic.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

arm64-bcc.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

arm64-big-endian-bitconverts.ll

[AArch64] Avoid unnecessary vector byte-swapping in big-endian

2018-01-24 14:13:47 +00:00

arm64-big-endian-eh.ll

Move the personality function from LandingPadInst to Function

2015-06-17 20:52:32 +00:00

arm64-big-endian-varargs.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

arm64-big-endian-vector-callee.ll

[AArch64] Register passes so they can be run by llc

2016-08-01 05:56:57 +00:00

arm64-big-endian-vector-caller.ll

[AArch64] Register passes so they can be run by llc

2016-08-01 05:56:57 +00:00

arm64-big-imm-offsets.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-big-stack.ll

[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction

2015-02-27 19:29:02 +00:00

arm64-bitfield-extract.ll

[AArch64] Generate literals by the little end

2017-01-18 18:57:08 +00:00

arm64-blockaddress.ll

[AArch64] Generate literals by the little end

2017-01-18 18:57:08 +00:00

arm64-build-vector.ll

[AArch64] Fix assertion failure on widened f16 BUILD_VECTOR

2018-08-06 14:14:41 +00:00

arm64-builtins-linux.ll

[AArch64][Fuchsia] Allow -mcmodel=kernel for --target=aarch64-fuchsia

2017-04-04 19:51:53 +00:00

arm64-call-tailcalls.ll

AArch64: Cleanup tailcall CC check, enable swiftcc.

2016-09-13 19:27:38 +00:00

arm64-cast-opt.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-ccmp-heuristics.ll

[AArch64] Register passes so they can be run by llc

2016-08-01 05:56:57 +00:00

arm64-ccmp.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

arm64-clrsb.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-coalesce-ext.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-coalescing-MOVi32imm.ll

Fix CHECK directives that weren't checking.

2015-08-31 21:10:35 +00:00

arm64-code-model-large-abs.ll

[AArch64] Generate literals by the little end

2017-01-18 18:57:08 +00:00

arm64-codegen-prepare-extload.ll

Fix some misc. -enable-var-scope violations

2017-11-13 01:47:52 +00:00

arm64-collect-loh-garbage-crash.ll

AArch64CollectLOH: Rewrite as block-local analysis.

2017-01-06 19:22:01 +00:00

arm64-collect-loh-str.ll

AArch64CollectLOH: Rewrite as block-local analysis.

2017-01-06 19:22:01 +00:00

arm64-collect-loh.ll

[AArch64] preserve test intent by removing undef

2018-05-17 18:07:02 +00:00

arm64-complex-copy-noneon.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

arm64-complex-ret.ll

[ARM][AArch64][DAG] Reenable post-legalize store merge

2017-12-06 15:30:13 +00:00

arm64-const-addr.ll

[AArch64] Generate literals by the little end

2017-01-18 18:57:08 +00:00

arm64-convert-v4f64.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-copy-tuple.ll

…

arm64-crc32.ll

Remove CRC32 instructions from AArch64InstrInfo::hasShiftedReg

2017-03-12 14:02:32 +00:00

arm64-crypto.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-cse.ll

[DAGCombiner] Teach DAG combiner that A-(B-C) can be folded to A+(C-B)

2018-07-28 00:27:25 +00:00

arm64-csel.ll

Partial revert of "NFC - Various typo fixes in tests"

2018-07-05 08:42:16 +00:00

arm64-csldst-mmo.ll

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

arm64-custom-call-saved-reg.ll

[AArch64] Support adding X[8-15,18] registers as CSRs.

2018-09-22 22:17:50 +00:00

arm64-cvt.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-dagcombiner-convergence.ll

…

arm64-dagcombiner-dead-indexed-load.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

arm64-dagcombiner-load-slicing.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

arm64-dead-def-frame-index.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-dead-register-def-bug.ll

[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.

2017-12-07 10:40:31 +00:00

arm64-detect-vec-redux.ll

Fix a bug in isVectorReductionOp() in SelectionDAGBuilder.cpp that may cause assertion failure on AArch64.

2016-02-26 23:25:30 +00:00

arm64-dup.ll

[AArch64][TableGen] Skip tied result operands for InstAlias

2017-11-20 14:36:40 +00:00

arm64-early-ifcvt.ll

[AArch64] Prefer Bcc to CBZ/CBNZ/TBZ/TBNZ when NZCV flags can be set for "free".

2017-06-23 19:20:12 +00:00

arm64-elf-calls.ll

…

arm64-elf-constpool.ll

[AArch64][GlobalISel] Enable GlobalISel at -O0 by default

2018-01-02 16:30:47 +00:00

arm64-elf-globals.ll

[AArch64][GlobalISel] Enable GlobalISel at -O0 by default

2018-01-02 16:30:47 +00:00

arm64-EXT-undef-mask.ll

[AArch64][GlobalISel] Enable GlobalISel at -O0 by default

2018-01-02 16:30:47 +00:00

arm64-ext.ll

[AArch64] define isExtractSubvectorCheap

2018-03-06 16:54:55 +00:00

arm64-extend-int-to-fp.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-extend.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

arm64-extern-weak.ll

[llvm] Remove redundant check-prefix=CHECK from tests. NFC.

2017-07-17 17:32:45 +00:00

arm64-extload-knownzero.ll

Codegen: Tail-duplicate during placement.

2016-10-11 20:36:43 +00:00

arm64-extract_subvector.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-extract.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-fast-isel-addr-offset.ll

[AArch64] Generate literals by the little end

2017-01-18 18:57:08 +00:00

arm64-fast-isel-alloca.ll

[AArch64][GlobalISel] Enable GlobalISel at -O0 by default

2018-01-02 16:30:47 +00:00

arm64-fast-isel-br.ll

[AArch64][GlobalISel] Enable GlobalISel at -O0 by default

2018-01-02 16:30:47 +00:00

arm64-fast-isel-call.ll

[FastISel] Disable local value sinking by default

2018-04-11 16:03:07 +00:00

arm64-fast-isel-conversion-fallback.ll

[AArch64][GlobalISel] Enable GlobalISel at -O0 by default

2018-01-02 16:30:47 +00:00

arm64-fast-isel-conversion.ll

[AArch64][GlobalISel] Enable GlobalISel at -O0 by default

2018-01-02 16:30:47 +00:00

arm64-fast-isel-fcmp.ll

[AArch64][GlobalISel] Enable GlobalISel at -O0 by default

2018-01-02 16:30:47 +00:00

arm64-fast-isel-gv.ll

[FastISel] Disable local value sinking by default

2018-04-11 16:03:07 +00:00

arm64-fast-isel-icmp.ll

[AArch64][GlobalISel] Enable GlobalISel at -O0 by default

2018-01-02 16:30:47 +00:00

arm64-fast-isel-indirectbr.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

arm64-fast-isel-intrinsic.ll

[FastISel] Disable local value sinking by default

2018-04-11 16:03:07 +00:00

arm64-fast-isel-materialize.ll

[AArch64][GlobalISel] Enable GlobalISel at -O0 by default

2018-01-02 16:30:47 +00:00

arm64-fast-isel-noconvert.ll

[AArch64][GlobalISel] Enable GlobalISel at -O0 by default

2018-01-02 16:30:47 +00:00

arm64-fast-isel-rem.ll

[AArch64][GlobalISel] Enable GlobalISel at -O0 by default

2018-01-02 16:30:47 +00:00

arm64-fast-isel-ret.ll

[AArch64][GlobalISel] Enable GlobalISel at -O0 by default

2018-01-02 16:30:47 +00:00

arm64-fast-isel-store.ll

Change the fast-isel-abort option from bool to int to enable "levels"

2015-02-27 18:32:11 +00:00

arm64-fast-isel.ll

[FastISel] Disable local value sinking by default

2018-04-11 16:03:07 +00:00

arm64-fastcc-tailcall.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-fastisel-gep-promote-before-add.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

arm64-fcmp-opt.ll

AArch64: work around how Cyclone handles "movi.2d vD, #0".

2017-12-18 10:36:00 +00:00

arm64-fcopysign.ll

add support for -print-imm-hex for AArch64

2016-05-13 18:00:09 +00:00

arm64-fixed-point-scalar-cvt-dagcombine.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-fma-combine-with-fpfusion.ll

[AArch64] Support for FP FMA when -ffp-contract=fast

2016-09-15 19:55:23 +00:00

arm64-fma-combines.ll

instr-combiner: sum up all latencies of the transformed instructions

2016-12-11 19:39:32 +00:00

arm64-fmadd.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-fmax-safe.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-fmax.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-fminv.ll

…

arm64-fml-combines.ll

[AArch64][MachineCombine] Fold FNMUL+FSUB -> FNMADD.

2017-05-11 20:07:24 +00:00

arm64-fmuladd.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-fold-address.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

arm64-fold-lsl.ll

[AArch64] Don't reduce the width of loads if it prevents combining a shift

2018-03-23 14:47:07 +00:00

arm64-fp128-folding.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-fp128.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

arm64-fp-contract-zero.ll

GlobalISel: rename legalizer components to match others.

2016-10-14 22:18:18 +00:00

arm64-fp-imm.ll

…

arm64-fp.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-fpcr.ll

[AArch64] Implement FLT_ROUNDS macro.

2018-06-20 12:09:01 +00:00

arm64-frame-index.ll

[AArch64] Register passes so they can be run by llc

2016-08-01 05:56:57 +00:00

arm64-global-address.ll

…

arm64-hello.ll

Revert "AArch64: Omit callframe setup/destroy when not necessary"

2018-01-29 19:56:42 +00:00

arm64-i16-subreg-extract.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-icmp-opt.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

arm64-illegal-float-ops.ll

…

arm64-indexed-memory.ll

[AArch64] Simplify indexed-memory testcase. NFC.

2016-12-22 22:27:05 +00:00

arm64-indexed-vector-ldst-2.ll

[AArch64] Fix performPostLD1Combine to check for constant lane index.

2018-05-11 16:25:06 +00:00

arm64-indexed-vector-ldst.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

arm64-inline-asm-error-I.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-inline-asm-error-J.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-inline-asm-error-K.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-inline-asm-error-L.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-inline-asm-error-M.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-inline-asm-error-N.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-inline-asm-zero-reg-error.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-inline-asm.ll

[AArch64] Avoid selecting XZR inline ASM memory operand

2017-07-14 21:46:16 +00:00

arm64-join-reserved.ll

[AArch64] Combine callee-save and local stack SP adjustment instructions.

2016-05-06 16:34:59 +00:00

arm64-jumptable.ll

[SimplifyCFG] Avoid quadratic on a predecessors number behavior in instruction sinking.

2017-12-21 01:22:13 +00:00

arm64-large-frame.ll

[AArch64] Enable PostRAScheduler for AArch64 generic build.

2015-12-21 14:43:45 +00:00

arm64-ld1.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-ld-from-st.ll

[AArch64] Promote loads from stored

2015-12-22 16:36:16 +00:00

arm64-ldp-aa.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-ldp-cluster.ll

[DAGCombiner] Set the right SDLoc on a newly-created sextload (6/N)

2018-05-11 18:40:08 +00:00

arm64-ldp.ll

[AArch64] Extend tests of loads and stores of register pairs

2017-09-19 15:46:35 +00:00

arm64-ldst-unscaled-pre-post.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

arm64-ldur.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-ldxr-stxr.ll

…

arm64-leaf.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-long-shift.ll

[AArch64] Take advantage of variable shift/rotate amount implicit mod operation.

2018-05-24 18:29:42 +00:00

arm64-memcpy-inline.ll

[AArch64] Gangup loads and stores for pairing.

2018-05-16 15:36:52 +00:00

arm64-memset-inline.ll

ARM64: improve non-zero memset isel by ~2x

2018-09-06 16:03:32 +00:00

arm64-memset-to-bzero.ll

Recommit "Enable MachineOutliner by default under -Oz for AArch64"

2018-07-27 20:18:27 +00:00

arm64-misaligned-memcpy-inline.ll

[AArch64] Fix PR32384: bump up the number of stores per memset and memcpy

2018-05-29 15:58:50 +00:00

arm64-misched-basic-A53.ll

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

arm64-misched-basic-A57.ll

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

arm64-misched-forwarding-A53.ll

[CodeGen] Print RegClasses on MI in verbose mode

2018-01-18 17:59:06 +00:00

arm64-misched-memdep-bug.ll

[CodeGen] Use MIR syntax for MachineMemOperand printing

2018-03-14 21:52:13 +00:00

arm64-misched-multimmo.ll

Revert r329611, "AArch64: Allow offsets to be folded into addresses with ELF."

2018-04-10 16:19:30 +00:00

arm64-movi.ll

[AArch64] Improve orr+movk sequences for MOVi64imm.

2018-05-24 19:38:23 +00:00

arm64-mul.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-named-reg-alloc.ll

Re-commit of r238201 with fix for building with shared libraries.

2015-06-01 12:02:47 +00:00

arm64-named-reg-notareg.ll

Re-commit of r238201 with fix for building with shared libraries.

2015-06-01 12:02:47 +00:00

arm64-narrow-st-merge.ll

[ARM][AArch64][DAG] Reenable post-legalize store merge

2017-12-06 15:30:13 +00:00

arm64-neg.ll

…

arm64-neon-2velem-high.ll

add support for -print-imm-hex for AArch64

2016-05-13 18:00:09 +00:00

arm64-neon-2velem.ll

[AArch64] Update test cases for Exynos M3

2018-01-30 15:40:27 +00:00

arm64-neon-3vdiff.ll

…

arm64-neon-aba-abd.ll

…

arm64-neon-across.ll

…

arm64-neon-add-pairwise.ll

…

arm64-neon-add-sub.ll

[AArch64] Register passes so they can be run by llc

2016-08-01 05:56:57 +00:00

arm64-neon-compare-instructions.ll

[Mips][AMDGPU] Update test cases to not use vector lt/gt compares that can be simplified to an equality/inequality or to always true/false.

2018-02-07 00:51:37 +00:00

arm64-neon-copy.ll

[AArch64] Improve single vector lane stores

2018-05-14 15:26:35 +00:00

arm64-neon-copyPhysReg-tuple.ll

…

arm64-neon-mul-div-cte.ll

[AArch64] Add missing testcase for r331522

2018-05-04 17:21:26 +00:00

arm64-neon-mul-div.ll

…

arm64-neon-scalar-by-elem-mul.ll

…

arm64-neon-select_cc.ll

[AArch64] Also combine vector selects fed by non-i1 SETCCs.

2015-04-27 21:43:12 +00:00

arm64-neon-simd-ldst-one.ll

[AArch64] Improve single vector lane stores

2018-05-14 15:26:35 +00:00

arm64-neon-simd-shift.ll

…

arm64-neon-simd-vget.ll

…

arm64-neon-v1i1-setcc.ll

[AArch64] Also combine vector selects fed by non-i1 SETCCs.

2015-04-27 21:43:12 +00:00

arm64-neon-v8.1a.ll

[AArch64] Add basic support for Qualcomm's Saphira CPU.

2017-09-25 14:05:00 +00:00

arm64-neon-vector-list-spill.ll

…

arm64-nvcast.ll

[AArch64] Add isel pattern for v8i8->v2f32 NVCASTs.

2018-04-18 17:10:19 +00:00

arm64-opt-remarks-lazy-bfi.ll

Add machine verifier to arm64-opt-remarks-lazy-bfi

2018-07-30 17:13:25 +00:00

arm64-patchpoint-scratch-regs.ll

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

arm64-patchpoint-webkit_jscc.ll

[FastISel] Disable local value sinking by default

2018-04-11 16:03:07 +00:00

arm64-patchpoint.ll

AArch64: allow MOV (imm) alias to be printed

2016-06-16 01:42:25 +00:00

arm64-pic-local-symbol.ll

[opaque pointer type] Add textual IR support for explicit type parameter to gep operator

2015-03-13 18:20:45 +00:00

arm64-platform-reg.ll

[AArch64] Support reserving x1-7 registers.

2018-09-07 20:58:57 +00:00

arm64-popcnt.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-prefetch.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-promote-const.ll

[AArch64] Register passes so they can be run by llc

2016-08-01 05:56:57 +00:00

arm64-redzone.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-reg-copy-noneon.ll

…

arm64-register-offset-addressing.ll

[AArch64] Don't reduce the width of loads if it prevents combining a shift

2018-03-23 14:47:07 +00:00

arm64-register-pairing.ll

AArch64: allow MOV (imm) alias to be printed

2016-06-16 01:42:25 +00:00

arm64-regress-f128csel-flags.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-regress-interphase-shift.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-regress-opt-cmp.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

arm64-reserve-call-saved-reg.ll

[AArch64] Support adding X[8-15,18] registers as CSRs.

2018-09-22 22:17:50 +00:00

arm64-reserved-arg-reg-call-error.ll

[AArch64] Support reserving x1-7 registers.

2018-09-07 20:58:57 +00:00

arm64-return-vector.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-returnaddr.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-rev.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-rounding.ll

Don't raise inexact when lowering ceil, floor, round, trunc.

2015-09-22 11:43:17 +00:00

arm64-scaled_iv.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

arm64-scvt.ll

Fix some misc. -enable-var-scope violations

2017-11-13 01:47:52 +00:00

arm64-setcc-int-to-fp-combine.ll

…

arm64-shifted-sext.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-shrink-v1i64.ll

fix trivial typos in comment, NFC

2017-06-24 16:00:26 +00:00

arm64-shrink-wrapping.ll

Reapply ARM: Do not spill CSR to stack on entry to noreturn functions

2018-04-07 10:57:03 +00:00

arm64-simd-scalar-to-vector.ll

[AArch64][GlobalISel] Enable GlobalISel at -O0 by default

2018-01-02 16:30:47 +00:00

arm64-simplest-elf.ll

…

arm64-sincos.ll

[TargetLowering] Android has sincos functions

2018-09-18 13:18:21 +00:00

arm64-sitofp-combine-chains.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-sli-sri-opt.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-smaxv.ll

[AArch64][TableGen] Skip tied result operands for InstAlias

2017-11-20 14:36:40 +00:00

arm64-sminv.ll

[AArch64][TableGen] Skip tied result operands for InstAlias

2017-11-20 14:36:40 +00:00

arm64-spill-lr.ll

WebAssembly: fix build breakage.

2015-07-14 23:06:07 +00:00

arm64-spill-remarks-treshold-hotness.ll

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

arm64-spill-remarks.ll

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

arm64-spill.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

arm64-sqshl-uqshl-i64Contant.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-st1.ll

[AArch64] Improve single vector lane unscaled stores

2018-05-15 20:41:12 +00:00

arm64-stack-no-frame.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

arm64-stackmap-nops.ll

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

arm64-stackmap.ll

[StackMaps] Increase the size of the "location size" field

2017-04-28 04:48:42 +00:00

arm64-stackpointer.ll

IR: Make metadata typeless in assembly

2014-12-15 19:07:53 +00:00

arm64-stacksave.ll

…

arm64-storebytesmerge.ll

[ARM][AArch64][DAG] Reenable post-legalize store merge

2017-12-06 15:30:13 +00:00

arm64-stp-aa.ll

[NFC] fix trivial typos in comments

2018-01-24 05:04:35 +00:00

arm64-stp.ll

AArch64: Cyclone: Remove SlowMisaligned128Store tuning flag

2018-01-24 00:39:53 +00:00

arm64-strict-align.ll

[AArch64] Define subtarget feature strict-align.

2015-07-29 14:17:26 +00:00

arm64-stur.ll

AArch64: Cyclone: Remove SlowMisaligned128Store tuning flag

2018-01-24 00:39:53 +00:00

arm64-subsections.ll

GlobalISel: rename legalizer components to match others.

2016-10-14 22:18:18 +00:00

arm64-subvector-extend.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-summary-remarks.ll

OptDiag: Add test for r296053

2017-02-24 01:13:09 +00:00

arm64-swizzle-tbl-i16-layout.ll

[MC] Use .p2align instead of .align

2016-01-26 00:03:25 +00:00

arm64-tbl.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-this-return.ll

Revert "Disable this-return argument forwarding on ARM/AArch64"

2016-07-20 04:13:01 +00:00

arm64-tls-darwin.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

arm64-tls-dynamic-together.ll

[AArch64][GlobalISel] Enable GlobalISel at -O0 by default

2018-01-02 16:30:47 +00:00

arm64-tls-dynamics.ll

[AArch64] Add Tiny Code Model for AArch64

2018-08-22 11:31:39 +00:00

arm64-tls-execs.ll

[AArch64] Add Tiny Code Model for AArch64

2018-08-22 11:31:39 +00:00

arm64-trap.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-triv-disjoint-mem-access.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

arm64-trn.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-trunc-store.ll

[AArch64] Enable PostRAScheduler for AArch64 generic build.

2015-12-21 14:43:45 +00:00

arm64-umaxv.ll

[AArch64][TableGen] Skip tied result operands for InstAlias

2017-11-20 14:36:40 +00:00

arm64-uminv.ll

[AArch64][TableGen] Skip tied result operands for InstAlias

2017-11-20 14:36:40 +00:00

arm64-umov.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-unaligned_ldst.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-uzp.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-vaargs.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-vabs.ll

[AArch64] Add patterns matching (fabs (fsub x y)) to (fabd x y)

2018-04-04 10:12:53 +00:00

arm64-vadd.ll

[DAGCombiner] use narrow load to avoid vector extract

2017-05-27 14:07:03 +00:00

arm64-vaddlv.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-vaddv.ll

[AArch64][TableGen] Skip tied result operands for InstAlias

2017-11-20 14:36:40 +00:00

arm64-variadic-aapcs.ll

[AArch64] Improve orr+movk sequences for MOVi64imm.

2018-05-24 19:38:23 +00:00

arm64-vbitwise.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-vclz.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-vcmp.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-vcnt.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-vcombine.ll

[AArch64][TableGen] Skip tied result operands for InstAlias

2017-11-20 14:36:40 +00:00

arm64-vcvt_f32_su32.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-vcvt_f.ll

[AArch64][GlobalISel] Enable GlobalISel at -O0 by default

2018-01-02 16:30:47 +00:00

arm64-vcvt_n.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-vcvt_su32_f32.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-vcvt.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-vcvtxd_f32_f64.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-vecCmpBr.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-vecFold.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-vector-ext.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-vector-imm.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-vector-insertion.ll

[AArch64] Improve code generation of constant vectors

2018-03-05 17:02:47 +00:00

arm64-vector-ldst.ll

Reland r329956, "AArch64: Introduce a DAG combine for folding offsets into addresses.", with a fix for the bot failure.

2018-04-23 19:09:34 +00:00

arm64-vext_reverse.ll

…

arm64-vext.ll

[DAG] Improve Aliasing of operations to static alloca

2017-07-18 20:06:24 +00:00

arm64-vfloatintrinsics.ll

[AArch64] allow v8f16 types when FullFP16 is supported

2017-09-15 09:24:48 +00:00

arm64-vhadd.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-vhsub.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-virtual_base.ll

[AArch64] Gangup loads and stores for pairing.

2018-05-16 15:36:52 +00:00

arm64-vmax.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-vminmaxnm.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-vmovn.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-vmul.ll

[DAGCombiner] use narrow load to avoid vector extract

2017-05-27 14:07:03 +00:00

arm64-volatile.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-vpopcnt.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-vqadd.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-vqsub.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-vselect.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-vsetcc_fp.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-vshift.ll

[DAGCombiner] use narrow load to avoid vector extract

2017-05-27 14:07:03 +00:00

arm64-vshr.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-vshuffle.ll

add support for -print-imm-hex for AArch64

2016-05-13 18:00:09 +00:00

arm64-vsqrt.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-vsra.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-vsub.ll

[DAGCombiner] use narrow load to avoid vector extract

2017-05-27 14:07:03 +00:00

arm64-weak-reference.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

arm64-xaluo.ll

[AArch64] Improve codegen for inverted overflow checking intrinsics

2017-10-09 15:15:09 +00:00

arm64-zero-cycle-regmov.ll

[AArch64] Split zero cycle feature more granularly

2018-09-28 19:05:09 +00:00

arm64-zero-cycle-zeroing.ll

[AArch64] Split zero cycle feature more granularly

2018-09-28 19:05:09 +00:00

arm64-zeroreg.ll

AArch64: Use DeadRegisterDefinitionsPass before regalloc.

2016-11-16 03:38:27 +00:00

arm64-zext.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-zextload-unscaled.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

arm64-zip.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

asm-large-immediate.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

asm-print-comments.ll

AsmPrinter: mark the beginning and the end of a function in verbose mode

2017-05-23 21:22:16 +00:00

assertion-rc-mismatch.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

atomic-ops-lse.ll

[AArch64] Improve v8.1-A code-gen for atomic load-and

2018-02-12 17:03:11 +00:00

atomic-ops-not-barriers.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

atomic-ops.ll

Recommit 'Remove the restriction that MachineSinking is now stopped by

2016-08-12 03:33:22 +00:00

basic-pic.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

bics.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

big-callframe.ll

Revert "AArch64: Omit callframe setup/destroy when not necessary"

2018-01-29 19:56:42 +00:00

bitcast-v2i8.ll

[AArch64] Enable PostRAScheduler for AArch64 generic build.

2015-12-21 14:43:45 +00:00

bitcast.ll

Fix PR23065. Avoid optimizing bitcast of build_vector with constant input to scalar_to_vector.

2015-04-01 01:52:38 +00:00

bitfield-extract.ll

AArch64: get type from correct result when forming BFX

2018-01-23 15:11:27 +00:00

bitfield-insert-0.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

bitfield-insert.ll

[NFC] fix trivial typos in documents and comments

2018-04-12 05:53:20 +00:00

bitfield.ll

[DAGCombiner] When combining zero_extend of a truncate, only mask before extending for vectors.

2018-03-01 22:32:25 +00:00

bitreverse.ll

[AArch64][TableGen] Skip tied result operands for InstAlias

2017-11-20 14:36:40 +00:00

blockaddress.ll

[AArch64] Add Tiny Code Model for AArch64

2018-08-22 11:31:39 +00:00

bool-loads.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

br-cond-not-merge.ll

[AArch64][GlobalISel] Enable GlobalISel at -O0 by default

2018-01-02 16:30:47 +00:00

br-to-eh-lpad.ll

Move the personality function from LandingPadInst to Function

2015-06-17 20:52:32 +00:00

br-undef-cond.ll

…

branch-folder-merge-mmos.ll

[SimplifyCFG] Handle tail-sinking of more than 2 incoming branches

2016-09-01 12:58:13 +00:00

branch-folder-oneinst.mir

[AArch64] Fix mir test case liveins info.

2018-05-15 16:27:34 +00:00

branch-relax-alignment.ll

GlobalISel: rename legalizer components to match others.

2016-10-14 22:18:18 +00:00

branch-relax-asm.ll

…

branch-relax-bcc.ll

BranchRelaxation: Fix handling of blocks with multiple conditional

2016-08-23 01:30:30 +00:00

branch-relax-cbz.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

branch-target-enforcement-indirect-calls.ll

[AArch64][v8.5A] Restrict indirect tail calls to use x16/17 only when using BTI

2018-10-08 14:09:15 +00:00

branch-target-enforcment.mir

[AArch64][v8.5A] Branch Target Identification code-generation pass

2018-10-08 14:04:24 +00:00

breg.ll

[AArch64] Register passes so they can be run by llc

2016-08-01 05:56:57 +00:00

bswap-known-bits.ll

[SelectionDAG] Add smarts for BSWAP in computeKnownBits.

2016-05-25 17:52:38 +00:00

build-one-lane.ll

[AArch64] Improve code generation of constant vectors

2018-03-05 17:02:47 +00:00

build-pair-isel.ll

[AArch64] Fix isel failure when BUILD_PAIR nodes are left over.

2018-04-10 19:01:58 +00:00

callee-save.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

ccmp-successor-probs.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

cfi_restore.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

chkstk.ll

[AArch64] Implement stack probing for windows

2017-12-20 06:51:45 +00:00

cmp-const-max.ll

[AArch64] Register passes so they can be run by llc

2016-08-01 05:56:57 +00:00

cmp-frameindex.ll

AArch64: account for possible frame index operand in compares.

2017-10-17 21:43:52 +00:00

cmpwithshort.ll

NFC - Various typo fixes in tests

2018-07-04 13:28:39 +00:00

cmpxchg-idioms.ll

Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"

2018-02-27 16:59:10 +00:00

cmpxchg-O0.ll

Revert r329611, "AArch64: Allow offsets to be folded into addresses with ELF."

2018-04-10 16:19:30 +00:00

code-model-large-abs.ll

[AArch64] Generate literals by the little end

2017-01-18 18:57:08 +00:00

code-model-tiny-abs.ll

[AArch64] Optimise load(adr address) to ldr address

2018-08-30 11:55:16 +00:00

combine-and-like.ll

[DAGCombine] visitANDLike - ensure APInt is is in range for getSExtValue/getZExtValue

2017-12-26 23:27:44 +00:00

combine-comparisons-by-cse.ll

CodeGen: BlockPlacement: Minor probability changes.

2017-04-10 22:28:18 +00:00

compare-branch.ll

Revert "CodeGen: Allow small copyable blocks to "break" the CFG."

2017-01-11 19:55:19 +00:00

compiler-ident.ll

IR: Make metadata typeless in assembly

2014-12-15 19:07:53 +00:00

complex-copy-noneon.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

complex-fp-to-int.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

complex-int-to-fp.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

concat_vector-scalar-combine.ll

[AArch64][TableGen] Skip tied result operands for InstAlias

2017-11-20 14:36:40 +00:00

concat_vector-truncate-combine.ll

[CodeGen] Combine concat_vector of trunc'd scalar to scalar_to_vector.

2015-04-09 20:04:47 +00:00

concat_vector-truncated-scalar-combine.ll

[CodeGen] Combine concat_vector of trunc'd scalar to scalar_to_vector.

2015-04-09 20:04:47 +00:00

cond-br-tuning.ll

[AArch64] AArch64CondBrTuningPass generates wrong branch instructions

2017-06-28 15:09:11 +00:00

cond-sel-value-prop.ll

Fix test from r285217.

2016-10-26 18:49:16 +00:00

cond-sel.ll

Recommit "Enable MachineOutliner by default under -Oz for AArch64"

2018-07-27 20:18:27 +00:00

consthoist-gep.ll

Revert "Revert r341269: [Constant Hoisting] Hoisting Constant GEP Expressions"

2018-09-04 22:17:03 +00:00

copyprop.mir

Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"

2018-02-27 16:59:10 +00:00

cpus.ll

[AArch64, ARM] Add support for Samsung Exynos M4

2018-06-06 18:56:00 +00:00

csel-zero-float.ll

[AArch64] Fix incorrect CSEL node created

2016-11-08 13:34:41 +00:00

cxx-tlscc.ll

[AArch64][GlobalISel] Enable GlobalISel at -O0 by default

2018-01-02 16:30:47 +00:00

dag-combine-invaraints.ll

[DAG] Improve Aliasing of operations to static alloca

2017-07-18 20:06:24 +00:00

dag-combine-mul-shl.ll

[DAGCombiner] Fix infinite loop in vector mul/shl combining

2016-11-23 16:05:51 +00:00

dag-combine-select.ll

[AArch64] Enable PostRAScheduler for AArch64 generic build.

2015-12-21 14:43:45 +00:00

dag-numsignbits.ll

[SelectionDAG] Support BUILD_VECTOR implicit truncation in SelectionDAG::ComputeNumSignBits (PR32273)

2017-03-15 16:22:24 +00:00

directcond.ll

[AArch64] Register passes so they can be run by llc

2016-08-01 05:56:57 +00:00

div_minsize.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

divrem.ll

[AArch64] Expand vector SDIVREM/UDIVREM operations.

2015-12-04 21:38:44 +00:00

dllexport.ll

[CodeGen] Hoist common AsmPrinter code out of X86, ARM, and AArch64

2018-01-17 23:55:23 +00:00

dllimport.ll

[GlobalISel] Bail out on calls to dllimported functions

2018-01-30 19:50:58 +00:00

dont-take-over-the-world.ll

…

dp1.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

dp2.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

dp-3source.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

dwarf-cfi.ll

[AArch64] Use dwarf exception handling on MinGW

2017-11-03 07:33:20 +00:00

eliminate-trunc.ll

[LSR] Recommit: Allow formula containing Reg for SCEVAddRecExpr related with outerloop.

2017-02-11 00:50:23 +00:00

emutls_generic.ll

[TLS] use emulated TLS if the target supports only this mode

2018-02-28 17:48:55 +00:00

emutls.ll

[TLS] use emulated TLS if the target supports only this mode

2018-02-28 17:48:55 +00:00

eon.ll

[AArch64] Change EON pattern to match more often.

2015-07-20 18:42:27 +00:00

expand-select.ll

[LegalizeDAG] Truncate condition operand of ISD::SELECT

2018-02-07 05:38:29 +00:00

extern-weak.ll

[AArch64] Add Tiny Code Model for AArch64

2018-08-22 11:31:39 +00:00

extract-bits.ll

[NFC][CodeGen][X86][AArch64] Add 64-bit constant bit field extract pattern tests

2018-09-30 12:42:08 +00:00

extract-lowbits.ll

[NFC][X86][AArch64] Reorganize/cleanup BZHI test patterns

2018-06-06 19:38:10 +00:00

extract.ll

…

f16-convert.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

f16-imm.ll

[AArch64] Add FMOVH0: materialize 0 using zero register for f16 values

2017-08-24 14:47:06 +00:00

f16-instructions.ll

[AArch64] Fix FCCMP with FP16 operands

2018-08-01 13:50:29 +00:00

fabs.ll

[SelectionDAG] Removing FABS folding from DAGCombiner

2018-03-30 15:42:52 +00:00

fadd-combines.ll

Utilize new SDNode flag functionality to expand current support for fadd

2018-06-18 23:44:59 +00:00

falkor-hwpf-fix.ll

[AArch64][Falkor] Avoid HW prefetcher tag collisions (step 2)

2017-07-18 16:14:22 +00:00

falkor-hwpf-fix.mir

[AArch64][Falkor] Fix bug in Falkor HWPF collision avoidance pass.

2018-04-10 21:43:03 +00:00

falkor-hwpf.ll

[AArch64][Falkor] Avoid HW prefetcher tag collisions (step 1)

2017-07-14 21:44:12 +00:00

fast-isel-address-extends.ll

Revert "[AArch64][FastISel] Add more truncation tests." and "[AArch64][FastISel] Always use an AND instruction when truncating to non-legal types."

2015-08-06 22:13:48 +00:00

fast-isel-addressing-modes.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

fast-isel-assume.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

fast-isel-atomic.ll

[AArch64][GlobalISel] Enable GlobalISel at -O0 by default

2018-01-02 16:30:47 +00:00

fast-isel-branch_weights.ll

[AArch64] Register passes so they can be run by llc

2016-08-01 05:56:57 +00:00

fast-isel-branch-cond-mask.ll

AArch64FastISel: Use cbz/cbnz to branch on i1

2015-12-03 17:19:58 +00:00

fast-isel-branch-cond-split.ll

Revive http://reviews.llvm.org/D12778 to handle forward-hot-prob and backward-hot-prob consistently.

2016-06-08 21:30:12 +00:00

fast-isel-call-return.ll

Change the fast-isel-abort option from bool to int to enable "levels"

2015-02-27 18:32:11 +00:00

fast-isel-cbz.ll

[AArch64] Register passes so they can be run by llc

2016-08-01 05:56:57 +00:00

fast-isel-cmp-branch.ll

[AArch64] Register passes so they can be run by llc

2016-08-01 05:56:57 +00:00

fast-isel-cmp-vec.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

fast-isel-cmpxchg.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

fast-isel-folded-shift.ll

[AArch64][FastISel] Don't fold shifts with UB.

2015-08-19 20:52:55 +00:00

fast-isel-folding.ll

Change the fast-isel-abort option from bool to int to enable "levels"

2015-02-27 18:32:11 +00:00

fast-isel-gep.ll

NFC - Various typo fixes in tests

2018-07-04 13:28:39 +00:00

fast-isel-int-ext2.ll

[AArch64] Register passes so they can be run by llc

2016-08-01 05:56:57 +00:00

fast-isel-int-ext3.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

fast-isel-int-ext4.ll

Change the fast-isel-abort option from bool to int to enable "levels"

2015-02-27 18:32:11 +00:00

fast-isel-int-ext5.ll

[AArch64][FastISel] Fix integer extend optimization.

2015-04-09 20:00:46 +00:00

fast-isel-int-ext.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

fast-isel-intrinsic.ll

…

fast-isel-logic-op.ll

[AArch64][FastISel] Don't fold shifts with UB.

2015-08-19 20:52:55 +00:00

fast-isel-memcpy.ll

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

fast-isel-mul.ll

Change the fast-isel-abort option from bool to int to enable "levels"

2015-02-27 18:32:11 +00:00

fast-isel-runtime-libcall.ll

Change the fast-isel-abort option from bool to int to enable "levels"

2015-02-27 18:32:11 +00:00

fast-isel-sdiv.ll

Fix check-prefix vs check-prefixes typo in updated test

2018-07-11 10:42:51 +00:00

fast-isel-select.ll

Change the fast-isel-abort option from bool to int to enable "levels"

2015-02-27 18:32:11 +00:00

fast-isel-shift.ll

Change the fast-isel-abort option from bool to int to enable "levels"

2015-02-27 18:32:11 +00:00

fast-isel-sp-adjust.ll

[AArch64][GlobalISel] Enable GlobalISel at -O0 by default

2018-01-02 16:30:47 +00:00

fast-isel-sqrt.ll

Change the fast-isel-abort option from bool to int to enable "levels"

2015-02-27 18:32:11 +00:00

fast-isel-switch-phi.ll

…

fast-isel-tail-call.ll

[CodeGen] Pass SDAG an ORE, and replace FastISel stats with remarks.

2017-03-30 17:49:58 +00:00

fast-isel-tbz.ll

[CodeGenPrepare] Sink and duplicate more 'and' instructions.

2017-02-21 18:53:14 +00:00

fast-isel-trunc.ll

Change the fast-isel-abort option from bool to int to enable "levels"

2015-02-27 18:32:11 +00:00

fast-isel-vector-arithmetic.ll

Change the fast-isel-abort option from bool to int to enable "levels"

2015-02-27 18:32:11 +00:00

fast-isel-vret.ll

Change the fast-isel-abort option from bool to int to enable "levels"

2015-02-27 18:32:11 +00:00

fast-regalloc-empty-bb-with-liveins.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

fastcc-reserved.ll

[AArch64] Remove an unnecessary restriction on pre-index instructions.

2015-09-30 19:44:40 +00:00

fastcc.ll

[AArch64] Fix bug in store of vector 0 DAGCombine.

2017-09-21 21:10:06 +00:00

fcmp.ll

…

fcopysign.ll

Fix FCOPYSIGN expansion

2018-08-02 01:54:12 +00:00

fcsel-zero.ll

[AArch64] Fix test triplet

2016-10-18 20:41:30 +00:00

fcvt_combine.ll

[DAG] fold FP binops with undef operands to NaN

2018-05-21 23:54:19 +00:00

fcvt-fixed.ll

…

fcvt-int.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

fdiv_combine.ll

add support for -print-imm-hex for AArch64

2016-05-13 18:00:09 +00:00

fdiv-combine.ll

Reapply r262054 with triple fix.

2016-02-26 21:18:34 +00:00

fence-singlethread.ll

Enhance synchscope representation

2017-07-11 22:23:00 +00:00

flags-multiuse.ll

Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"

2018-02-27 16:59:10 +00:00

floatdp_1source.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

floatdp_2source.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

fold-constants.ll

[SelectionDAG] reset NewNodesMustHaveLegalTypes flag between basic blocks

2017-08-07 05:51:14 +00:00

fold-global-offsets.ll

Reland r329956, "AArch64: Introduce a DAG combine for folding offsets into addresses.", with a fix for the bot failure.

2018-04-23 19:09:34 +00:00

fp16_intrinsic_lane.ll

[AArch64] Add vmulxh_lane fp16 vector intrinsic

2018-03-20 20:25:40 +00:00

fp16_intrinsic_scalar_1op.ll

[AArch64] Codegen tests for the Armv8.2-A FP16 intrinsics

2018-03-15 13:42:28 +00:00

fp16_intrinsic_scalar_2op.ll

[AArch64] Reverting FP16 vcvth_n_s64_f16 to fix

2018-06-27 14:34:40 +00:00

fp16_intrinsic_scalar_3op.ll

[AArch64] Codegen tests for the Armv8.2-A FP16 intrinsics

2018-03-15 13:42:28 +00:00

fp16_intrinsic_vector_1op.ll

[AArch64] Codegen tests for the Armv8.2-A FP16 intrinsics

2018-03-15 13:42:28 +00:00

fp16_intrinsic_vector_2op.ll

[AArch64] Add patterns matching (fabs (fsub x y)) to (fabd x y)

2018-04-04 10:12:53 +00:00

fp16_intrinsic_vector_3op.ll

[AArch64] Codegen tests for the Armv8.2-A FP16 intrinsics

2018-03-15 13:42:28 +00:00

fp16-v4-instructions.ll

[AArch64] optimise v4f16 fcmps to utilise vector instructions

2018-01-22 14:16:11 +00:00

fp16-v8-instructions.ll

[FileCheck] Add -allow-deprecated-dag-overlap to failing llvm tests

2018-07-11 20:25:49 +00:00

fp16-v16-instructions.ll

[AArch64][TableGen] Skip tied result operands for InstAlias

2017-11-20 14:36:40 +00:00

fp16-vector-bitcast.ll

…

fp16-vector-load-store.ll

[AArch64] Improve single vector lane unscaled stores

2018-05-15 20:41:12 +00:00

fp16-vector-nvcast.ll

add support for -print-imm-hex for AArch64

2016-05-13 18:00:09 +00:00

fp16-vector-shuffle.ll

[AArch64][TableGen] Skip tied result operands for InstAlias

2017-11-20 14:36:40 +00:00

fp128-folding.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

fp-cond-sel.ll

AArch64: work around how Cyclone handles "movi.2d vD, #0".

2017-12-18 10:36:00 +00:00

fp-dp3.ll

…

fpconv-vector-op-scalarize.ll

…

fpimm.ll

[AArch64] Optimise load(adr address) to ldr address

2018-08-30 11:55:16 +00:00

fptouint-i8-zext.ll

[Legalizer] Fix fp-to-uint to fp-tosint promotion assertion.

2017-01-04 22:11:42 +00:00

frameaddr.ll

Change the fast-isel-abort option from bool to int to enable "levels"

2015-02-27 18:32:11 +00:00

free-zext.ll

[CodeGenPrepare] Create more extloads and fewer ands

2015-11-20 22:34:39 +00:00

ftrunc.ll

[DAGCombiner] restrict (float)((int) f) --> ftrunc with no-signed-zeros

2018-06-27 18:16:40 +00:00

func-argpassing.ll

Revert r329611, "AArch64: Allow offsets to be folded into addresses with ELF."

2018-04-10 16:19:30 +00:00

func-calls.ll

Revert r329611, "AArch64: Allow offsets to be folded into addresses with ELF."

2018-04-10 16:19:30 +00:00

funcptr_cast.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

function-subtarget-features.ll

AArch64: simplify test case

2015-03-21 04:37:08 +00:00

funnel-shift-rot.ll

[SelectionDAG] try harder to convert funnel shift to rotate

2018-08-09 17:26:22 +00:00

funnel-shift.ll

[SelectionDAG] fix bug in translating funnel shift with non-power-of-2 type

2018-08-01 17:17:08 +00:00

gep-nullptr.ll

[AArch64] Register passes so they can be run by llc

2016-08-01 05:56:57 +00:00

ghc-cc.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

global-alignment.ll

[opaque pointer type] Add textual IR support for explicit type parameter for global aliases

2015-09-11 03:22:04 +00:00

global-merge-1.ll

[GlobalMerge] Set the alignment on merged global structs

2018-06-06 14:48:32 +00:00

global-merge-2.ll

[GlobalMerge] Set the alignment on merged global structs

2018-06-06 14:48:32 +00:00

global-merge-3.ll

[GlobalMerge] Fix GlobalMerge on bss external global variables.

2018-08-30 00:49:50 +00:00

global-merge-4.ll

[GlobalMerge] Set the alignment on merged global structs

2018-06-06 14:48:32 +00:00

global-merge-group-by-use.ll

[GlobalMerge] Set the alignment on merged global structs

2018-06-06 14:48:32 +00:00

global-merge-ignore-single-use-minsize.ll

[GlobalMerge] Set the alignment on merged global structs

2018-06-06 14:48:32 +00:00

global-merge-ignore-single-use.ll

[GlobalMerge] Set the alignment on merged global structs

2018-06-06 14:48:32 +00:00

global-merge.ll

…

got-abuse.ll

…

half.ll

[AArch64] Fix DAG selection for cmps for fp16 type

2016-05-11 01:26:32 +00:00

hints.ll

add support for -print-imm-hex for AArch64

2016-05-13 18:00:09 +00:00

i1-contents.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

i128-align.ll

[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction

2015-02-27 19:29:02 +00:00

i128-fast-isel-fallback.ll

Revert "[AArch64] Coalesce Copy Zero during instruction selection"

2018-06-21 16:05:24 +00:00

iabs.ll

[AArch64] Add integer abs testcases for D51873.

2018-09-13 17:11:25 +00:00

ifcvt-select.ll

[AArch64] Fixup test after r281160

2016-09-11 08:24:04 +00:00

illegal-float-ops.ll

[Analysis] Disable calls to *_finite and other glibc-only functions on Android.

2018-01-31 19:12:50 +00:00

implicit-sret.ll

AArch64: Safely handle the incoming sret call argument.

2015-02-16 18:10:47 +00:00

init-array.ll

…

inline-asm-clobber.ll

[CodeGen] emit inline asm clobber list warnings for reserved (cont)

2018-08-30 12:52:35 +00:00

inline-asm-constraints-badI.ll

…

inline-asm-constraints-badK2.ll

…

inline-asm-constraints-badK.ll

…

inline-asm-constraints-badL.ll

…

inline-asm-globaladdress.ll

[opaque pointer type] Add textual IR support for explicit type parameter to gep operator

2015-03-13 18:20:45 +00:00

inlineasm-illegal-type.ll

[AArch64] Reject inline asm with FP registers when FP is disabled.

2018-08-24 19:12:13 +00:00

inlineasm-ldr-pseudo.ll

AArch64: allow MOV (imm) alias to be printed

2016-06-16 01:42:25 +00:00

inlineasm-S-constraint.ll

[AArch64] Support "S" inline assembler constraint

2018-05-16 09:33:25 +00:00

inlineasm-X-allocation.ll

[AArch64] Implement lowering of the X constraint on AArch64

2016-05-09 11:10:44 +00:00

inlineasm-X-constraint.ll

[AArch64] Implement lowering of the X constraint on AArch64

2016-05-09 11:10:44 +00:00

intrinsics-memory-barrier.ll

[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction

2015-02-27 19:29:02 +00:00

jump-table.ll

[AArch64] Add Tiny Code Model for AArch64

2018-08-22 11:31:39 +00:00

known-never-nan.ll

DAG: Fix isKnownNeverNaN for basic non-sNaN cases

2018-08-17 21:19:22 +00:00

lack-of-signed-truncation-check.ll

[DAGCombine] optimizeSetCCOfSignedTruncationCheck(): handle inverted pattern

2018-09-02 13:56:22 +00:00

large_shift.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

large-consts.ll

[AArch64] Generate literals by the little end

2017-01-18 18:57:08 +00:00

ldp-stp-scaled-unscaled-pairs.ll

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

ldradr.ll

[AArch64] Optimise load(adr address) to ldr address

2018-08-30 11:55:16 +00:00

ldst-miflags.mir

[AArch64] Keep track of MIFlags in the LoadStoreOptimizer

2018-03-14 17:10:58 +00:00

ldst-opt-aa.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

ldst-opt-zr-clobber.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

ldst-opt.ll

Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"

2018-02-27 16:59:10 +00:00

ldst-opt.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

ldst-paired-aliasing.ll

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

ldst-regoffset.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

ldst-unscaledimm.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

ldst-unsignedimm.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

ldst-zero.ll

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

legalize-bug-bogus-cpu.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

lit.local.cfg

[AArch64] Remove useless 'import re' from CodeGen lit.local.cfg. NFC.

2016-08-02 19:04:25 +00:00

literal_pools_float.ll

[AArch64] Optimise load(adr address) to ldr address

2018-08-30 11:55:16 +00:00

live-interval-analysis.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

load-combine-big-endian.ll

[DAGCombiner] Support {a|s}ext, {a|z|s}ext load nodes in load combine

2017-03-01 18:12:29 +00:00

load-combine.ll

Fix a reoccuring typo in load-combine tests

2018-03-27 17:33:50 +00:00

local_vars.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

logical_shifted_reg.ll

Revert "CodeGen: Allow small copyable blocks to "break" the CFG."

2017-01-11 19:55:19 +00:00

logical-imm.ll

AArch64: allow MOV (imm) alias to be printed

2016-06-16 01:42:25 +00:00

loh.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

loop-micro-op-buffer-size-t99.ll

[AArch64] Improve loop unrolling performance on Cavium T99

2017-12-09 23:59:55 +00:00

loopvectorize_pr33804_double.ll

[LoopVectorizer] Add more testcases for PR33804.

2017-09-18 17:28:15 +00:00

lower-range-metadata-func-call.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

machine_cse_impdef_killflags.ll

ScheduleDAGInstrs: Ignore dependencies of constant physregs

2016-11-10 23:46:44 +00:00

machine_cse.ll

Codegen: Tail-duplicate during placement.

2016-10-11 20:36:43 +00:00

machine-combiner-madd.ll

[AArch64] Update test cases for Exynos M3

2018-01-30 15:40:27 +00:00

machine-combiner.ll

[MachineCombiner] Add check for optimal pattern order.

2018-01-31 13:54:30 +00:00

machine-combiner.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

machine-copy-prop.ll

[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.

2017-12-07 10:40:31 +00:00

machine-copy-remove.ll

AArch64: always clear kill flags up to last eliminated copy

2016-02-17 23:07:04 +00:00

machine-copy-remove.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

machine-dead-copy.mir

[MachineCopyPropagation] Handle COPY with overlapping source/dest.

2018-03-30 00:56:03 +00:00

machine-outliner-bad-adrp.mir

[MachineOutliner] Add missing liveness tracking info in MIR test.

2018-07-07 08:42:31 +00:00

machine-outliner-bad-register.mir

[MachineOutliner] Don't outline sequences where x16/x17/nzcv are live across

2018-06-27 17:43:27 +00:00

machine-outliner-bti.mir

[AArch64][v8.5A] Don't create BR instructions in outliner when BTI enabled

2018-10-08 14:12:08 +00:00

machine-outliner-calls.mir

[MachineOutliner] Add defs to calls + don't track liveness on outlined functions

2018-04-27 23:36:35 +00:00

machine-outliner-default.mir

Recommit "Enable MachineOutliner by default under -Oz for AArch64"

2018-07-27 20:18:27 +00:00

machine-outliner-flags.ll

Recommit "Enable MachineOutliner by default under -Oz for AArch64"

2018-07-27 20:18:27 +00:00

machine-outliner-inline-asm-adrp.mir

[MachineOutliner] Check for explicit uses of LR/W30 in MI operands

2018-04-24 22:38:15 +00:00

machine-outliner-noredzone.ll

[MachineOutliner] Add defs to calls + don't track liveness on outlined functions

2018-04-27 23:36:35 +00:00

machine-outliner-regsave.mir

[MachineOutliner][AArch64] Add support for saving LR to a register

2018-07-30 17:45:28 +00:00

machine-outliner-remarks.ll

[SelectionDAG] Remove debug locations from ConstantSD(FP)Nodes

2018-06-25 17:06:18 +00:00

machine-outliner-size-info.mir

[MachineOutliner] Add codegen size remarks to the MachineOutliner

2018-09-11 23:05:34 +00:00

machine-outliner-tail.ll

[MachineOutliner] Don't save/restore LR for tail calls.

2018-05-16 19:49:01 +00:00

machine-outliner-thunk.ll

[AArch64] Fix verifier error when outlining indirect calls

2018-10-08 09:18:48 +00:00

machine-outliner.ll

[MachineOutliner][AArch64] Add support for saving LR to a register

2018-07-30 17:45:28 +00:00

machine-outliner.mir

[MachineOutliner][AArch64] Add support for saving LR to a register

2018-07-30 17:45:28 +00:00

machine-scheduler.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

machine-sink-kill-flags.ll

Clear kill flags on all used registers when sinking instructions.

2015-05-08 17:54:32 +00:00

machine-sink-zr.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

machine-zero-copy-remove.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

macho-global-symbols.ll

AArch64: use linker-private symbols for globals in MachO.

2017-05-15 21:51:38 +00:00

macho-trap.ll

MachO: trap unreachable instructions

2018-04-13 22:25:20 +00:00

macro-fusion-last.mir

MacroFusion: Fix macro fusion with ExitSU failing in top-down scheduling

2018-07-26 17:43:56 +00:00

madd-combiner.ll

…

madd-lohi.ll

…

mature-mc-support.ll

[LLC] Add an inline assembly diagnostics handler.

2017-02-03 11:14:39 +00:00

max-jump-table.ll

Recommit "Enable MachineOutliner by default under -Oz for AArch64"

2018-07-27 20:18:27 +00:00

memcpy-f128.ll

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

merge-store-dependency.ll

Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"

2018-02-27 16:59:10 +00:00

merge-store.ll

AArch64: Cyclone: Remove SlowMisaligned128Store tuning flag

2018-01-24 00:39:53 +00:00

mergestores_noimplicitfloat.ll

[AArch64] Gangup loads and stores for pairing.

2018-05-16 15:36:52 +00:00

min-jump-table.ll

[CodeGen] Print jump-table index operands as %jump-table.0 in both MIR and debug output

2017-12-13 10:30:59 +00:00

mingw-refptr.ll

[MinGW] [AArch64] Add stubs for potential automatic dllimported variables

2018-09-04 20:56:21 +00:00

minmax-of-minmax.ll

[ValueTracking] recognize min/max-of-min/max with notted ops (PR35875)

2018-01-11 15:13:47 +00:00

minmax.ll

Don't create a MIN/MAX node if the underlying compare has more than one use.

2015-06-04 13:48:23 +00:00

misched-fusion-addr.ll

[AArch64, ARM] Add support for Samsung Exynos M4

2018-06-06 18:56:00 +00:00

misched-fusion-aes.ll

[AArch64, ARM] Add support for Samsung Exynos M4

2018-06-06 18:56:00 +00:00

misched-fusion-crypto-eor.mir

[CodeGen] Always print register ties in MI::dump()

2018-09-26 13:33:09 +00:00

misched-fusion-csel.ll

[AArch64, ARM] Add support for Samsung Exynos M4

2018-06-06 18:56:00 +00:00

misched-fusion-lit.ll

[AArch64, ARM] Add support for Samsung Exynos M4

2018-06-06 18:56:00 +00:00

misched-fusion.ll

[AArch64] Restore the test of conditional branch fusion

2017-08-21 21:57:43 +00:00

misched-stp.ll

AArch64: Cyclone: Remove SlowMisaligned128Store tuning flag

2018-01-24 00:39:53 +00:00

mlicm-stack-write-check.mir

[MachineLICM] Debug intrinsics shouldn't affect hoist decisions

2018-05-04 19:25:09 +00:00

movimm-wzr.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

movw-consts.ll

AArch64: allow MOV (imm) alias to be printed

2016-06-16 01:42:25 +00:00

movw-shift-encoding.ll

[AArch64] Generate literals by the little end

2017-01-18 18:57:08 +00:00

mul_pow2.ll

[AArch64] Lower multiplication by a constant int to shl+add+shl

2016-11-15 20:16:48 +00:00

mul-lohi.ll

instr-combiner: sum up all latencies of the transformed instructions

2016-12-11 19:39:32 +00:00

neg-imm.ll

Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"

2018-02-27 16:59:10 +00:00

neon-bitcast.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

neon-bitwise-instructions.ll

[AArch64] Harden test case

2018-03-05 17:42:18 +00:00

neon-compare-instructions.ll

[Mips][AMDGPU] Update test cases to not use vector lt/gt compares that can be simplified to an equality/inequality or to always true/false.

2018-02-07 00:51:37 +00:00

neon-diagnostics.ll

…

neon-dot-product.ll

[AArch64] Codegen for v8.2A dot product intrinsics

2018-04-27 13:45:32 +00:00

neon-extract.ll

[AArch64] Harden test cases

2018-02-26 23:19:25 +00:00

neon-fma-FMF.ll

Utilize new SDNode flag functionality to expand current support for fma

2018-06-16 00:03:06 +00:00

neon-fma.ll

…

neon-fpround_f128.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

neon-idiv.ll

[AArch64] Custom Lower MULLH{S,U} for v16i8, v8i16, and v4i32

2018-05-04 14:33:55 +00:00

neon-inline-asm-16-bit-fp.ll

This patch adds support for 16 bit floating point registers to the inline asm register selection on AArch64.

2016-11-07 15:42:12 +00:00

neon-mla-mls.ll

…

neon-mov.ll

[LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC.

2016-04-19 23:51:52 +00:00

neon-or-combine.ll

…

neon-perm.ll

[LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC.

2016-04-19 23:51:52 +00:00

neon-scalar-by-elem-fma.ll

…

neon-scalar-copy.ll

[AArch64] define isExtractSubvectorCheap

2018-03-06 16:54:55 +00:00

neon-shift-left-long.ll

…

neon-truncStore-extLoad.ll

[AArch64] Add custom lowering for v4i8 trunc store

2018-06-27 13:58:46 +00:00

nest-register.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

no-fp-asm-clobbers-crash.ll

Don't crash when we see unallocatable registers in clobbers

2017-10-23 20:46:36 +00:00

no-quad-ldp-stp.ll

[AArch64] Update test cases for Exynos M3

2018-01-30 15:40:27 +00:00

no-stack-arg-probe.ll

[ARM, AArch64] Check the no-stack-arg-probe attribute for dynamic stack probes

2018-03-19 20:06:50 +00:00

nonlazybind.ll

AArch64: put nonlazybind special handling behind a flag for now.

2017-04-17 18:18:47 +00:00

nontemporal.ll

Revert "AArch64: Omit callframe setup/destroy when not necessary"

2018-01-29 19:56:42 +00:00

nzcv-save.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

O0-pipeline.ll

[AArch64][v8.5A] Branch Target Identification code-generation pass

2018-10-08 14:04:24 +00:00

O3-pipeline.ll

[AArch64][v8.5A] Branch Target Identification code-generation pass

2018-10-08 14:04:24 +00:00

optimize-cond-branch.ll

Codegen: Make chains from trellis-shaped CFGs

2017-02-15 19:49:14 +00:00

optimize-imm.ll

[AArch64] Fix PRR33100.

2017-05-23 06:08:37 +00:00

or-combine.ll

DAGCombine: fold (or (and X, M), (and X, N)) -> (and X, (or M, N))

2015-01-21 23:17:19 +00:00

overlapping-copy-bundle-cycle.mir

Re-apply "[VirtRegRewriter] Avoid clobbering registers when expanding copy bundles"

2018-06-14 19:24:03 +00:00

overlapping-copy-bundle.mir

Re-apply "[VirtRegRewriter] Avoid clobbering registers when expanding copy bundles"

2018-06-14 19:24:03 +00:00

paired-load.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

PBQP-chain.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

PBQP-coalesce-benefit.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

PBQP-csr.ll

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

PBQP.ll

…

phi-dbg.ll

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

pic-eh-stubs.ll

Stop producing .data.rel sections.

2015-11-18 06:02:15 +00:00

pie.ll

Use shouldAssumeDSOLocal on AArch64.

2016-05-26 12:42:55 +00:00

post-ra-machine-sink.mir

[PostRASink] extend the live-in check for all aliased registers

2018-04-27 19:59:20 +00:00

postra-mi-sched.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

pow.ll

[DAGCombiner] try to convert pow(x, 0.25) to sqrt(sqrt(x))

2018-09-05 17:01:56 +00:00

pr27816.ll

Add test case for merging of chained stores of mismatched type.

2017-03-20 19:48:22 +00:00

pr33172.ll

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

preferred-alignment.ll

[AArch64][GlobalISel] Enable GlobalISel at -O0 by default

2018-01-02 16:30:47 +00:00

preferred-function-alignment.ll

[AArch64] Add pipeline model for Exynos M3

2018-01-30 15:40:16 +00:00

prefixdata.ll

Ensure that prefix data is preserved with subsections-via-symbols

2017-03-15 04:18:16 +00:00

preserve_mostcc.ll

Add support for a preserve_most calling convention to the AArch64 backend.

2016-03-10 04:35:09 +00:00

print-mrs-system-register.ll

[AArch64InstPrinter] Use the feature bits of the subtarget passed to the print

2015-03-27 20:37:20 +00:00

prologue-epilogue-remarks.mir

[PEI] Add basic opt-remarks support

2017-07-19 23:47:32 +00:00

ragreedy-csr.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

rbit.ll

[AArch64] Add support for lowering bitreverse to the rbit instruction.

2017-01-10 17:20:33 +00:00

readcyclecounter.ll

[AArch64] Lower READCYCLECOUNTER using MRS PMCCTNR_EL0.

2015-09-01 16:23:45 +00:00

recp-fastmath.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

redundant-copy-elim-empty-mbb.ll

AArch64: Don't call getIterator() on iterators

2016-08-18 17:58:09 +00:00

Redundantstore.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

reg-scavenge-frame.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

regcoal-physreg.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

regress-bitcast-formals.ll

…

regress-f128csel-flags.ll

…

regress-fp128-livein.ll

…

regress-tail-livereg.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

regress-tblgen-chains.ll

Fix some broken CHECK lines.

2017-01-22 20:28:56 +00:00

regress-w29-reserved-with-fp.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

rem_crash.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

remat-float0.ll

[AArch64] Add FileCheck that was missing from test in r232967.

2015-03-23 20:25:15 +00:00

remat.ll

[AArch64, ARM] Add support for Samsung Exynos M4

2018-06-06 18:56:00 +00:00

returnaddr.ll

…

reverse-csr-restore-seq.mir

[AArch64] Place the first ldp at the end when ReverseCSRRestoreSeq is true

2018-04-27 15:30:54 +00:00

rm_redundant_cmp.ll

[SimplifyCFG] Handle tail-sinking of more than 2 incoming branches

2016-09-01 12:58:13 +00:00

rotate-extract.ll

[DAGCombiner] Bug 31275- Extract a shift from a constant mul or udiv if a rotate can be formed

2018-07-30 16:50:00 +00:00

rotate.ll

[ARM] Expand ROTL and ROTR of vector value types

2015-10-27 10:25:20 +00:00

round-conv.ll

Don't raise inexact when lowering ceil, floor, round, trunc.

2015-09-22 11:43:17 +00:00

sat-add.ll

[DAGCombiner] use UADDO to optimize saturated unsigned add

2018-09-24 14:47:15 +00:00

sched-past-vector-ldst.ll

[AArch64] Transfer memory operands when lowering vector load/store intrinsics

2016-11-07 22:39:02 +00:00

scheduledag-constreg.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

sdag-store-merging-bug.ll

[AArch64][DAGCombiner]: change -stop-after=isel to instruction-select

2018-10-02 00:22:51 +00:00

sdivpow2.ll

[AArch64] Regenerate SDIV tests

2018-07-11 10:39:50 +00:00

selectcc-to-shiftand.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

selectiondag-order.ll

[DAG] Don't increase SDNodeOrder for dbg.value/declare.

2017-01-19 13:55:55 +00:00

seqpairspill.mir

AArch64: Fix XSeqPairs/WSeqPairs problems

2018-10-04 17:02:53 +00:00

setcc-takes-i32.ll

…

setcc-type-mismatch.ll

ARM & AArch64: teach LowerVSETCC that output type size may differ from input.

2015-02-08 00:50:47 +00:00

shadow-call-stack.ll

AArch64: Implement support for the shadowcallstack attribute.

2018-04-04 21:55:44 +00:00

shift-mod.ll

[AArch64] Take advantage of variable shift/rotate amount implicit mod operation.

2018-05-24 18:29:42 +00:00

shrink-wrap.ll

[ShrinkWrap] Teach ShrinkWrap to handle targets requiring a register scavenger.

2015-11-20 21:54:27 +00:00

shrink-wrapping-vla.ll

Add tests for shrink wrapping and VLAs

2018-04-18 13:37:12 +00:00

sibling-call.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

sign-return-address.ll

Revert r343317

2018-09-28 17:01:50 +00:00

signbit-shift.ll

[DAGCombiner] transform sub-of-shifted-signbit to add

2018-07-30 22:21:37 +00:00

signed-truncation-check.ll

[DAGCombine] optimizeSetCCOfSignedTruncationCheck(): handle inverted pattern

2018-09-02 13:56:22 +00:00

simple-macho.ll

GlobalISel: rename legalizer components to match others.

2016-10-14 22:18:18 +00:00

sincos-expansion.ll

[SelectionDAG] Allow sin/cos -> sincos optimization on GNU triples w/ just -fno-math-errno

2017-06-12 17:15:41 +00:00

sincospow-vector-expansion.ll

…

sink-copy-for-shrink-wrap.ll

[CodeGen] Add a new pass for PostRA sink

2018-03-22 20:06:47 +00:00

sitofp-fixed-legal.ll

AArch64: avoid assertion on illegal types in performFDivCombine.

2016-08-26 18:52:31 +00:00

special-reg.ll

AArch64: TableGenerate system instruction operands.

2016-07-05 21:23:04 +00:00

spill-fold.ll

[AArch64] Fold more spilled/refilled COPYs.

2016-12-01 23:43:55 +00:00

spill-fold.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

spill-stack-realignment.mir

[AArch64] Fix scavenged spill slot base when stack realignment required.

2018-04-26 18:50:45 +00:00

spill-undef.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

sqrt-fastmath.ll

[AArch64] add tests with sqrt estimate and ieee denorms; NFC

2018-02-01 17:57:45 +00:00

stack_guard_remat.ll

Add address space mangling to lifetime intrinsics

2017-04-10 20:18:21 +00:00

stack-guard-remat-bitcast.ll

[AArch64] Prefer Bcc to CBZ/CBNZ/TBZ/TBNZ when NZCV flags can be set for "free".

2017-06-23 19:20:12 +00:00

stack-protector-target.ll

[AArch64][Fuchsia] Allow -mcmodel=kernel for --target=aarch64-fuchsia

2017-04-04 19:51:53 +00:00

stackguard-internal.ll

[AArch64] Don't crash trying to resolve __stack_chk_guard.

2018-04-21 00:07:46 +00:00

stackmap-frame-setup.ll

Add extra operand to CALLSEQ_START to keep frame part set up previously

2017-05-09 13:35:13 +00:00

stackmap-liveness.ll

[StackMaps] Increase the size of the "location size" field

2017-04-28 04:48:42 +00:00

store_merge_pair_offset.ll

[AArch64] Fix over-eager early-exit in load-store combiner

2017-01-04 21:21:46 +00:00

strqro.ll

[AArch64] Harden test cases

2018-02-26 23:19:25 +00:00

strqu.ll

[AArch64] Fix BITCAST lowering crash

2018-02-16 20:00:57 +00:00

sub1.ll

[TargetLowering] try to create -1 constant operand for math ops via demanded bits

2018-02-11 14:38:23 +00:00

subs-to-sub-opt.ll

ScheduleDAGInstrs: Ignore dependencies of constant physregs

2016-11-10 23:46:44 +00:00

swift-error.ll

AArch64: support SwiftCC properly on AAPCS64

2017-09-22 04:31:44 +00:00

swift-return.ll

[AArch64][GlobalISel] Enable GlobalISel at -O0 by default

2018-01-02 16:30:47 +00:00

swiftcc.ll

Swift Calling Convetion: add support for AArch64.

2016-08-26 19:28:17 +00:00

swifterror.ll

[FileCheck] Add -allow-deprecated-dag-overlap to failing llvm tests

2018-07-11 20:25:49 +00:00

swiftself-scavenger.ll

RegisterScavenging: Followup to r305625

2017-06-20 18:43:14 +00:00

swiftself.ll

[AArch64][GlobalISel] Enable GlobalISel at -O0 by default

2018-01-02 16:30:47 +00:00

tail-call.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

tailcall_misched_graph.ll

[CodeGen] Don't omit any redundant information in -debug output

2018-02-26 15:23:42 +00:00

tailcall-ccmismatch.ll

ARM, AArch64, X86: Check preserved registers for tail calls.

2016-04-04 18:56:13 +00:00

tailcall-explicit-sret.ll

Revert "AArch64: Omit callframe setup/destroy when not necessary"

2018-01-29 19:56:42 +00:00

tailcall-fastisel.ll

[AArch64][GlobalISel] Enable GlobalISel at -O0 by default

2018-01-02 16:30:47 +00:00

tailcall-implicit-sret.ll

[ARM][AArch64][DAG] Reenable post-legalize store merge

2017-12-06 15:30:13 +00:00

tailcall-mem-intrinsics.ll

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

tailcall-string-rvo.ll

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

taildup-cfi.ll

Correct dwarf unwind information in function epilogue

2018-04-24 10:32:08 +00:00

tailmerging_in_mbp.ll

[AARCH64] Enable AARCH64 lit tests on windows dev machines

2016-07-19 13:35:11 +00:00

tbi.ll

[AArch64] Fix legality info passed to demanded bits for TBI opt.

2017-07-27 21:27:25 +00:00

tbz-tbnz.ll

[AArch64] Prefer Bcc to CBZ/CBNZ/TBZ/TBNZ when NZCV flags can be set for "free".

2017-06-23 19:20:12 +00:00

tiny_model.ll

[AArch64] Optimise load(adr address) to ldr address

2018-08-30 11:55:16 +00:00

tiny_supported.ll

[AArch64] Add Tiny Code Model for AArch64

2018-08-22 11:31:39 +00:00

trunc-v1i64.ll

…

tst-br.ll

[AArch64] Register passes so they can be run by llc

2016-08-01 05:56:57 +00:00

umulo-128-legalisation-lowering.ll

[SelectionDAG] Improve the legalisation lowering of UMULO.

2018-08-16 18:39:39 +00:00

unfold-masked-merge-scalar-constmask-innerouter.ll

Extend hasStoreToStackSlot with list of FI accesses.

2018-09-03 09:15:58 +00:00

unfold-masked-merge-scalar-constmask-interleavedbits.ll

Extend hasStoreToStackSlot with list of FI accesses.

2018-09-03 09:15:58 +00:00

unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll

Extend hasStoreToStackSlot with list of FI accesses.

2018-09-03 09:15:58 +00:00

unfold-masked-merge-scalar-constmask-lowhigh.ll

Extend hasStoreToStackSlot with list of FI accesses.

2018-09-03 09:15:58 +00:00

unfold-masked-merge-scalar-variablemask.ll

Extend hasStoreToStackSlot with list of FI accesses.

2018-09-03 09:15:58 +00:00

unfold-masked-merge-vector-variablemask-const.ll

[DAGCombine][X86][AArch64] Masked merge unfolding: vector edition.

2018-05-21 21:41:02 +00:00

unfold-masked-merge-vector-variablemask.ll

[DAGCombine][X86][AArch64] Masked merge unfolding: vector edition.

2018-05-21 21:41:02 +00:00

unreachable-emergency-spill-slot.mir

[AArch64] Add test case for r329797

2018-04-11 13:37:25 +00:00

urem-seteq-optsize.ll

[NFC][CodeGen][SelectionDAG] Tests for X % C == 0 codegen improvement.

2018-08-30 09:32:21 +00:00

urem-seteq-vec-nonsplat.ll

[AARCH64][X86] Remove _nonsplat from test names

2018-10-07 11:24:04 +00:00

urem-seteq-vec-splat.ll

[DagCombine][NFC] Some more tests fo for X % C == 0 (UREM case) transform

2018-09-11 15:34:26 +00:00

urem-seteq.ll

[NFC][CodeGen][SelectionDAG] Tests for X % C == 0 codegen improvement.

2018-08-30 09:32:21 +00:00

vcvt-oversize.ll

MachineScheduler: Fully compare top/bottom candidates

2016-06-25 00:23:00 +00:00

vec-libcalls.ll

Extend hasStoreToStackSlot with list of FI accesses.

2018-09-03 09:15:58 +00:00

vecreduce-propagate-sd-flags.ll

[DAG] propagate FMF for all FPMathOperators

2018-05-15 14:16:24 +00:00

vector_merge_dep_check.ll

In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.

2017-03-14 00:34:14 +00:00

vector-fcopysign.ll

[AArch64][TableGen] Skip tied result operands for InstAlias

2017-11-20 14:36:40 +00:00

win64_vararg.ll

[AArch64] Implement dynamic stack probing for windows

2018-02-17 14:26:32 +00:00

win_cst_pool.ll

Revert "[COFF] Use comdat shared constants for MinGW as well"

2018-07-26 10:48:20 +00:00

win-alloca-no-stack-probe.ll

[ARM, AArch64] Check the no-stack-arg-probe attribute for dynamic stack probes

2018-03-19 20:06:50 +00:00

win-alloca.ll

[AArch64] Fix use of a regex in the win-alloca.ll test. NFC.

2018-03-09 09:45:37 +00:00

win-tls.ll

[AArch64] Fold adds with tprel_lo12_nc and secrel_lo12 into a following ldr/str

2018-03-12 18:47:43 +00:00

xbfiz.ll

[AArch64] Improved bitfield instruction selection.

2015-09-18 17:11:53 +00:00

xray-attribute-instrumentation.ll

[XRay][CodeGen] Use PIC-friendly code in XRay sleds and remove synthetic references in .text

2017-09-04 05:34:58 +00:00

xray-tail-call-sled.ll

[XRay][CodeGen] Use PIC-friendly code in XRay sleds and remove synthetic references in .text

2017-09-04 05:34:58 +00:00

zero-reg.ll

[AArch64] Fold more spilled/refilled COPYs.

2016-12-01 23:43:55 +00:00

zext-logic-shift-load.ll

[DAGCombiner] Fold (zext (and/or/xor (shl/shr (load x), cst), cst))

2018-04-07 23:36:10 +00:00