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https://github.com/RPCS3/llvm.git
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71589ff672
Enable enableMultipleCopyHints() on X86. Original Patch by @jonpa: While enabling the mischeduler for SystemZ, it was discovered that for some reason a test needed one extra seemingly needless COPY (test/CodeGen/SystemZ/call-03.ll). The handling for that is resulted in this patch, which improves the register coalescing by providing not just one copy hint, but a sorted list of copy hints. On SystemZ, this gives ~12500 less register moves on SPEC, as well as marginally less spilling. Instead of improving just the SystemZ backend, the improvement has been implemented in common-code (calculateSpillWeightAndHint(). This gives a lot of test failures, but since this should be a general improvement I hope that the involved targets will help and review the test updates. Differential Revision: https://reviews.llvm.org/D38128 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342578 91177308-0d34-0410-b5e6-96231b3b80d8
172 lines
4.9 KiB
LLVM
172 lines
4.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
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define i32 @sub_zext_cmp_mask_same_size_result(i32 %x) {
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; CHECK-LABEL: sub_zext_cmp_mask_same_size_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
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; CHECK-NEXT: andl $1, %edi
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; CHECK-NEXT: leal -28(%rdi), %eax
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; CHECK-NEXT: retq
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%a = and i32 %x, 1
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%c = icmp eq i32 %a, 0
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%z = zext i1 %c to i32
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%r = sub i32 -27, %z
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ret i32 %r
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}
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define i32 @sub_zext_cmp_mask_wider_result(i8 %x) {
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; CHECK-LABEL: sub_zext_cmp_mask_wider_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
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; CHECK-NEXT: andl $1, %edi
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; CHECK-NEXT: leal 26(%rdi), %eax
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; CHECK-NEXT: retq
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%a = and i8 %x, 1
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%c = icmp eq i8 %a, 0
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%z = zext i1 %c to i32
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%r = sub i32 27, %z
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ret i32 %r
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}
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define i8 @sub_zext_cmp_mask_narrower_result(i32 %x) {
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; CHECK-LABEL: sub_zext_cmp_mask_narrower_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: andl $1, %eax
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; CHECK-NEXT: orb $46, %al
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; CHECK-NEXT: # kill: def $al killed $al killed $eax
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; CHECK-NEXT: retq
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%a = and i32 %x, 1
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%c = icmp eq i32 %a, 0
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%z = zext i1 %c to i8
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%r = sub i8 47, %z
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ret i8 %r
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}
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define i8 @add_zext_cmp_mask_same_size_result(i8 %x) {
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; CHECK-LABEL: add_zext_cmp_mask_same_size_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: andb $1, %al
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; CHECK-NEXT: xorb $27, %al
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; CHECK-NEXT: # kill: def $al killed $al killed $eax
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; CHECK-NEXT: retq
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%a = and i8 %x, 1
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%c = icmp eq i8 %a, 0
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%z = zext i1 %c to i8
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%r = add i8 %z, 26
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ret i8 %r
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}
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define i32 @add_zext_cmp_mask_wider_result(i8 %x) {
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; CHECK-LABEL: add_zext_cmp_mask_wider_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: andl $1, %eax
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; CHECK-NEXT: xorl $27, %eax
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; CHECK-NEXT: retq
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%a = and i8 %x, 1
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%c = icmp eq i8 %a, 0
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%z = zext i1 %c to i32
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%r = add i32 %z, 26
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ret i32 %r
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}
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define i8 @add_zext_cmp_mask_narrower_result(i32 %x) {
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; CHECK-LABEL: add_zext_cmp_mask_narrower_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: andl $1, %eax
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; CHECK-NEXT: xorb $43, %al
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; CHECK-NEXT: # kill: def $al killed $al killed $eax
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; CHECK-NEXT: retq
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%a = and i32 %x, 1
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%c = icmp eq i32 %a, 0
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%z = zext i1 %c to i8
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%r = add i8 %z, 42
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ret i8 %r
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}
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define i32 @low_bit_select_constants_bigger_false_same_size_result(i32 %x) {
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; CHECK-LABEL: low_bit_select_constants_bigger_false_same_size_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
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; CHECK-NEXT: andl $1, %edi
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; CHECK-NEXT: leal 42(%rdi), %eax
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; CHECK-NEXT: retq
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%a = and i32 %x, 1
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%c = icmp eq i32 %a, 0
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%r = select i1 %c, i32 42, i32 43
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ret i32 %r
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}
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define i64 @low_bit_select_constants_bigger_false_wider_result(i32 %x) {
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; CHECK-LABEL: low_bit_select_constants_bigger_false_wider_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
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; CHECK-NEXT: andl $1, %edi
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; CHECK-NEXT: leaq 26(%rdi), %rax
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; CHECK-NEXT: retq
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%a = and i32 %x, 1
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%c = icmp eq i32 %a, 0
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%r = select i1 %c, i64 26, i64 27
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ret i64 %r
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}
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define i16 @low_bit_select_constants_bigger_false_narrower_result(i32 %x) {
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; CHECK-LABEL: low_bit_select_constants_bigger_false_narrower_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
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; CHECK-NEXT: andl $1, %edi
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; CHECK-NEXT: leal 36(%rdi), %eax
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; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
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; CHECK-NEXT: retq
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%a = and i32 %x, 1
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%c = icmp eq i32 %a, 0
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%r = select i1 %c, i16 36, i16 37
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ret i16 %r
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}
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define i8 @low_bit_select_constants_bigger_true_same_size_result(i8 %x) {
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; CHECK-LABEL: low_bit_select_constants_bigger_true_same_size_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: andb $1, %al
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; CHECK-NEXT: xorb $-29, %al
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; CHECK-NEXT: # kill: def $al killed $al killed $eax
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; CHECK-NEXT: retq
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%a = and i8 %x, 1
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%c = icmp eq i8 %a, 0
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%r = select i1 %c, i8 227, i8 226
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ret i8 %r
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}
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define i32 @low_bit_select_constants_bigger_true_wider_result(i8 %x) {
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; CHECK-LABEL: low_bit_select_constants_bigger_true_wider_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: andl $1, %eax
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; CHECK-NEXT: xorl $227, %eax
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; CHECK-NEXT: retq
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%a = and i8 %x, 1
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%c = icmp eq i8 %a, 0
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%r = select i1 %c, i32 227, i32 226
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ret i32 %r
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}
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define i8 @low_bit_select_constants_bigger_true_narrower_result(i16 %x) {
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; CHECK-LABEL: low_bit_select_constants_bigger_true_narrower_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: andl $1, %eax
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; CHECK-NEXT: xorb $41, %al
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; CHECK-NEXT: # kill: def $al killed $al killed $eax
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; CHECK-NEXT: retq
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%a = and i16 %x, 1
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%c = icmp eq i16 %a, 0
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%r = select i1 %c, i8 41, i8 40
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ret i8 %r
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}
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