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3a1a366906
The dream of a unified check-line auto-generator for all phases of compilation is dead. The llc script has already diverged to be better at its goal, so having 2 scripts that do almost the same thing is just causing confusion. We can rip out the llc ability in update_test_checks.py next and rename it, so it will be clear that we have one script for llc check auto-generation and another for opt. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305206 91177308-0d34-0410-b5e6-96231b3b80d8
46 lines
1.2 KiB
LLVM
46 lines
1.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
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define i32 @neg_lshr_signbit(i32 %x) {
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; X64-LABEL: neg_lshr_signbit:
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; X64: # BB#0:
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; X64-NEXT: sarl $31, %edi
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: retq
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%sh = lshr i32 %x, 31
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%neg = sub i32 0, %sh
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ret i32 %neg
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}
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define i64 @neg_ashr_signbit(i64 %x) {
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; X64-LABEL: neg_ashr_signbit:
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; X64: # BB#0:
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; X64-NEXT: shrq $63, %rdi
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: retq
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%sh = ashr i64 %x, 63
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%neg = sub i64 0, %sh
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ret i64 %neg
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}
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define <4 x i32> @neg_ashr_signbit_vec(<4 x i32> %x) {
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; X64-LABEL: neg_ashr_signbit_vec:
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; X64: # BB#0:
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; X64-NEXT: psrld $31, %xmm0
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; X64-NEXT: retq
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%sh = ashr <4 x i32> %x, <i32 31, i32 31, i32 31, i32 31>
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%neg = sub <4 x i32> zeroinitializer, %sh
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ret <4 x i32> %neg
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}
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define <8 x i16> @neg_lshr_signbit_vec(<8 x i16> %x) {
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; X64-LABEL: neg_lshr_signbit_vec:
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; X64: # BB#0:
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; X64-NEXT: psraw $15, %xmm0
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; X64-NEXT: retq
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%sh = lshr <8 x i16> %x, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>
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%neg = sub <8 x i16> zeroinitializer, %sh
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ret <8 x i16> %neg
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}
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