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to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351636 91177308-0d34-0410-b5e6-96231b3b80d8
188 lines
6.4 KiB
C++
188 lines
6.4 KiB
C++
//===- llvm/CodeGen/VirtRegMap.h - Virtual Register Map ---------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements a virtual register map. This maps virtual registers to
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// physical registers and virtual registers to stack slots. It is created and
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// updated by a register allocator and then used by a machine code rewriter that
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// adds spill code and rewrites virtual into physical register references.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_VIRTREGMAP_H
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#define LLVM_CODEGEN_VIRTREGMAP_H
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#include "llvm/ADT/IndexedMap.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/TargetRegisterInfo.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/Pass.h"
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#include <cassert>
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namespace llvm {
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class MachineFunction;
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class MachineRegisterInfo;
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class raw_ostream;
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class TargetInstrInfo;
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class VirtRegMap : public MachineFunctionPass {
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public:
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enum {
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NO_PHYS_REG = 0,
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NO_STACK_SLOT = (1L << 30)-1,
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MAX_STACK_SLOT = (1L << 18)-1
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};
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private:
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MachineRegisterInfo *MRI;
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const TargetInstrInfo *TII;
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const TargetRegisterInfo *TRI;
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MachineFunction *MF;
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/// Virt2PhysMap - This is a virtual to physical register
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/// mapping. Each virtual register is required to have an entry in
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/// it; even spilled virtual registers (the register mapped to a
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/// spilled register is the temporary used to load it from the
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/// stack).
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IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2PhysMap;
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/// Virt2StackSlotMap - This is virtual register to stack slot
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/// mapping. Each spilled virtual register has an entry in it
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/// which corresponds to the stack slot this register is spilled
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/// at.
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IndexedMap<int, VirtReg2IndexFunctor> Virt2StackSlotMap;
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/// Virt2SplitMap - This is virtual register to splitted virtual register
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/// mapping.
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IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2SplitMap;
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/// createSpillSlot - Allocate a spill slot for RC from MFI.
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unsigned createSpillSlot(const TargetRegisterClass *RC);
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public:
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static char ID;
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VirtRegMap() : MachineFunctionPass(ID), Virt2PhysMap(NO_PHYS_REG),
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Virt2StackSlotMap(NO_STACK_SLOT), Virt2SplitMap(0) {}
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VirtRegMap(const VirtRegMap &) = delete;
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VirtRegMap &operator=(const VirtRegMap &) = delete;
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bool runOnMachineFunction(MachineFunction &MF) override;
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.setPreservesAll();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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MachineFunction &getMachineFunction() const {
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assert(MF && "getMachineFunction called before runOnMachineFunction");
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return *MF;
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}
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MachineRegisterInfo &getRegInfo() const { return *MRI; }
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const TargetRegisterInfo &getTargetRegInfo() const { return *TRI; }
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void grow();
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/// returns true if the specified virtual register is
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/// mapped to a physical register
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bool hasPhys(unsigned virtReg) const {
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return getPhys(virtReg) != NO_PHYS_REG;
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}
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/// returns the physical register mapped to the specified
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/// virtual register
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unsigned getPhys(unsigned virtReg) const {
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assert(TargetRegisterInfo::isVirtualRegister(virtReg));
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return Virt2PhysMap[virtReg];
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}
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/// creates a mapping for the specified virtual register to
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/// the specified physical register
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void assignVirt2Phys(unsigned virtReg, MCPhysReg physReg);
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/// clears the specified virtual register's, physical
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/// register mapping
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void clearVirt(unsigned virtReg) {
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assert(TargetRegisterInfo::isVirtualRegister(virtReg));
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assert(Virt2PhysMap[virtReg] != NO_PHYS_REG &&
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"attempt to clear a not assigned virtual register");
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Virt2PhysMap[virtReg] = NO_PHYS_REG;
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}
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/// clears all virtual to physical register mappings
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void clearAllVirt() {
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Virt2PhysMap.clear();
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grow();
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}
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/// returns true if VirtReg is assigned to its preferred physreg.
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bool hasPreferredPhys(unsigned VirtReg);
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/// returns true if VirtReg has a known preferred register.
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/// This returns false if VirtReg has a preference that is a virtual
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/// register that hasn't been assigned yet.
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bool hasKnownPreference(unsigned VirtReg);
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/// records virtReg is a split live interval from SReg.
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void setIsSplitFromReg(unsigned virtReg, unsigned SReg) {
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Virt2SplitMap[virtReg] = SReg;
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}
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/// returns the live interval virtReg is split from.
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unsigned getPreSplitReg(unsigned virtReg) const {
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return Virt2SplitMap[virtReg];
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}
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/// getOriginal - Return the original virtual register that VirtReg descends
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/// from through splitting.
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/// A register that was not created by splitting is its own original.
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/// This operation is idempotent.
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unsigned getOriginal(unsigned VirtReg) const {
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unsigned Orig = getPreSplitReg(VirtReg);
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return Orig ? Orig : VirtReg;
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}
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/// returns true if the specified virtual register is not
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/// mapped to a stack slot or rematerialized.
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bool isAssignedReg(unsigned virtReg) const {
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if (getStackSlot(virtReg) == NO_STACK_SLOT)
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return true;
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// Split register can be assigned a physical register as well as a
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// stack slot or remat id.
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return (Virt2SplitMap[virtReg] && Virt2PhysMap[virtReg] != NO_PHYS_REG);
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}
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/// returns the stack slot mapped to the specified virtual
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/// register
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int getStackSlot(unsigned virtReg) const {
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assert(TargetRegisterInfo::isVirtualRegister(virtReg));
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return Virt2StackSlotMap[virtReg];
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}
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/// create a mapping for the specifed virtual register to
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/// the next available stack slot
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int assignVirt2StackSlot(unsigned virtReg);
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/// create a mapping for the specified virtual register to
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/// the specified stack slot
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void assignVirt2StackSlot(unsigned virtReg, int SS);
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void print(raw_ostream &OS, const Module* M = nullptr) const override;
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void dump() const;
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};
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inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) {
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VRM.print(OS);
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return OS;
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}
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} // end llvm namespace
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#endif // LLVM_CODEGEN_VIRTREGMAP_H
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