Files
archived-llvm/lib/Target/WebAssembly
Dan Gohman e94b2105e9 [WebAssembly] Fix dominance check for PHIs in the StoreResult pass
When a block has no terminator instructions, getFirstTerminator() returns
end(), which can't be used in dominance checks. Check dominance for phi
operands separately.

Also, remove some bits from WebAssemblyRegStackify.cpp that were causing
trouble on the same testcase; they were left behind from an earlier
experiment.

Differential Revision: http://reviews.llvm.org/D15210


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254662 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-03 23:07:03 +00:00
..
2015-10-16 16:35:49 +00:00
2015-07-27 23:25:54 +00:00

//===-- README.txt - Notes for WebAssembly code gen -----------------------===//

This WebAssembly backend is presently in a very early stage of development.
The code should build and not break anything else, but don't expect a lot more
at this point.

For more information on WebAssembly itself, see the design documents:
  * https://github.com/WebAssembly/design/blob/master/README.md

The following documents contain some information on the planned semantics and
binary encoding of WebAssembly itself:
  * https://github.com/WebAssembly/design/blob/master/AstSemantics.md
  * https://github.com/WebAssembly/design/blob/master/BinaryEncoding.md

Interesting work that remains to be done:
* Write a pass to restructurize irreducible control flow. This needs to be done
  before register allocation to be efficient, because it may duplicate basic
  blocks and WebAssembly performs register allocation at a whole-function
  level. Note that LLVM's GPU code has such a pass, but it linearizes control
  flow (e.g. both sides of branches execute and are masked) which is undesirable
  for WebAssembly.

//===---------------------------------------------------------------------===//

set_local instructions have a return value. We should (a) model this,
and (b) write optimizations which take advantage of it. Keep in mind that
many set_local instructions are implicit!

//===---------------------------------------------------------------------===//

Load and store instructions can have a constant offset. We should (a) model
this, and (b) do address-mode folding with it.

//===---------------------------------------------------------------------===//

Br, br_if, and tableswitch instructions can support having a value on the
expression stack across the jump (sometimes). We should (a) model this, and
(b) extend the stackifier to utilize it.

//===---------------------------------------------------------------------===//