Matt Arsenault caa831cabd AMDGPU: Fix verifier error in SIFoldOperands ...

There may be other use operands that also need their kill flags cleared.

This happens in a few tests when SIFoldOperands is moved after
PeepholeOptimizer.

PeepholeOptimizer rewrites cases that look like:
%vreg0 = ...
%vreg1 = COPY %vreg0
use %vreg1<kill>
%vreg2 = COPY %vreg0
use %vreg2<kill>

to use the earlier source to
%vreg0 = ...
use %vreg0
use %vreg0

Currently SIFoldOperands sees the copied registers, so there is
only one use. So far I haven't managed to come up with a test
that currently has multiple uses of a foldable VGPR -> VGPR copy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250960 91177308-0d34-0410-b5e6-96231b3b80d8

2015-10-21 22:37:50 +00:00

..

AArch64

[AArch64]Merge halfword loads into a 32-bit load

2015-10-19 18:34:53 +00:00

AMDGPU

AMDGPU: Fix verifier error in SIFoldOperands

2015-10-21 22:37:50 +00:00

ARM

Adding support for TargetLoweringBase::LibCall

2015-10-20 13:14:52 +00:00

BPF

[bpf] Do not expand UNDEF SDNode during insn selection lowering

2015-10-08 18:52:40 +00:00

CPP

Fix CPP Backend for GEP API changes for opaque pointer types

2015-09-08 18:42:29 +00:00

Generic

[Hexagon] Reverting test file change.

2015-10-17 01:58:51 +00:00

Hexagon

Tail duplication can mix incompatible registers in phi nodes

2015-10-21 02:40:06 +00:00

Inputs

DI: Require subprogram definitions to be distinct

2015-08-28 20:26:49 +00:00

Mips

[mips][mips16] Re-work the inline assembly stubs to work with IAS. NFC.

2015-10-21 12:44:14 +00:00

MIR

[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.

2015-10-15 14:34:23 +00:00

MSP430

[opaque pointer type] Add textual IR support for explicit type parameter to gep operator

2015-03-13 18:20:45 +00:00

NVPTX

[NVPTX] Let NVPTX backend detect integer min and max patterns.

2015-08-26 23:22:02 +00:00

PowerPC

[MachO] Stop generating *coal* sections.

2015-10-15 05:28:38 +00:00

SPARC

Drop assert that a call with struct return goes to a function with sret

2015-10-21 20:05:01 +00:00

SystemZ

Let MachineVerifier be aware of mem-to-mem instructions.

2015-10-21 07:39:47 +00:00

Thumb

[ARM] Modify codegen for memcpy intrinsic to prefer LDM/STM.

2015-10-05 14:49:54 +00:00

Thumb2

[ARM] Use correct half-precision functions in EABI mode

2015-10-07 16:58:49 +00:00

WebAssembly

WebAssembly: support imports

2015-10-21 02:23:09 +00:00

WinEH

[WinEH] Fix eh.exceptionpointer intrinsic lowering

2015-10-17 00:08:08 +00:00

X86

[WinEH] Add test for llvm.va.start in catchpad

2015-10-21 19:54:40 +00:00

XCore

[opaque pointer type] Add textual IR support for explicit type parameter for global aliases

2015-09-11 03:22:04 +00:00