Elena Demikhovsky cdce03426d Fixed a bug in narrowing store operation. ...

Type MVT::i1 became legal in KNL, but store operation can't be narrowed to this type,
since the size of VT (1 bit) is not equal to its actual store size(8 bits).

Added a test provided by David (dag@cray.com)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226805 91177308-0d34-0410-b5e6-96231b3b80d8

2015-01-22 09:39:08 +00:00

..

AArch64

DAGCombine: fold (or (and X, M), (and X, N)) -> (and X, (or M, N))

2015-01-21 23:17:19 +00:00

ARM

Fix load-store optimizer on thumbv4t

2015-01-21 22:39:43 +00:00

CPP

IR: add "cmpxchg weak" variant to support permitted failure.

2014-06-13 14:24:07 +00:00

Generic

getMangledTypeStr: clarify how it mangles types, and add tests

2015-01-14 23:05:17 +00:00

Hexagon

[Hexagon] Converting multiply and accumulate with immediate intrinsics to patterns.

2015-01-21 18:13:15 +00:00

Inputs

IR: Move MDLocation into place

2015-01-14 22:27:36 +00:00

Mips

[mips] Add registers and ALL check prefix to octeon test case.

2015-01-20 16:14:02 +00:00

MSP430

Drop the W postfix on the 16-bit registers.

2014-09-10 06:58:14 +00:00

NVPTX

Check that the TLI callback enableAggressiveFMAFusion has the desired effect on FMA folding.

2015-01-14 15:36:28 +00:00

PowerPC

[PowerPC] Add r2 as an operand for all calls under both PPC64 ELF V1 and V2

2015-01-19 07:20:27 +00:00

R600

DAGCombine: fold (or (and X, M), (and X, N)) -> (and X, (or M, N))

2015-01-21 23:17:19 +00:00

SPARC

Use the integrated assembler by default on SPARC.

2015-01-14 07:53:39 +00:00

SystemZ

Use the integrated assembler as default on SystemZ

2015-01-13 19:45:16 +00:00

Thumb

IR: Move MDLocation into place

2015-01-14 22:27:36 +00:00

Thumb2

[ARM] Fix a bug in constant island pass that was triggering an assertion.

2015-01-08 20:44:50 +00:00

X86

Fixed a bug in narrowing store operation.

2015-01-22 09:39:08 +00:00

XCore

IR: Move MDLocation into place

2015-01-14 22:27:36 +00:00