Bill Wendling d36d03bf2d Added a check so that if we have two machine instructions in this form ...

MOV R0, R1
    MOV R1, R0

the second machine instruction is removed. Added a regression test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29792 91177308-0d34-0410-b5e6-96231b3b80d8

2006-08-21 07:33:33 +00:00

..

Alpha

This is fixed

2006-07-11 01:39:30 +00:00

ARM

add a "load effective address"

2006-08-17 17:09:40 +00:00

CBackend

Update testcase with recent cbe change

2006-05-24 20:52:08 +00:00

Generic

Applying for all.

2006-08-03 20:56:35 +00:00

IA64

Added the ability to xfail based on llvmgcc version

2006-04-12 21:57:40 +00:00

PowerPC

New testcase

2006-08-15 23:45:28 +00:00

SPARC

Added the ability to xfail based on llvmgcc version

2006-04-12 21:57:40 +00:00

X86

Added a check so that if we have two machine instructions in this form

2006-08-21 07:33:33 +00:00

.cvsignore

Tired of wading through cvs's list ? files that are generated when building

2006-03-23 23:41:57 +00:00