Evandro Menezes dd4e083abf [ARM] Add new target feature to fuse literal generation ...

This feature enables the fusion of such operations on Cortex A57 and Cortex
A72, as recommended in their Software Optimisation Guides, sections 4.14 and
4.11, respectively.

Differential revision: https://reviews.llvm.org/D49563

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338147 91177308-0d34-0410-b5e6-96231b3b80d8

2018-07-27 18:16:47 +00:00

..

AArch64

[AArch64, PowerPC, x86] add more signbit math tests; NFC

2018-07-27 18:12:29 +00:00

AMDGPU

AMDGPU/R600: Add MOV instructions to BFE patterns

2018-07-27 15:00:13 +00:00

ARC

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ARM

[ARM] Add new target feature to fuse literal generation

2018-07-27 18:16:47 +00:00

AVR

[AVR] Set trackLivenessAfterRegAlloc

2018-06-11 14:46:48 +00:00

BPF

bpf: add missing RegState to notify MachineInstr verifier necessary register usage

2018-07-27 16:58:52 +00:00

Generic

Implement strip.invariant.group

2018-07-02 04:49:30 +00:00

Hexagon

[Hexagon] Properly scale bit index when extracting elements from vNi1

2018-07-25 16:20:59 +00:00

Inputs

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Lanai

Remove SETCCE use from Lanai's backend

2018-06-03 12:56:24 +00:00

Mips

[mips] Sign extend i32 return values on MIPS64

2018-07-26 10:59:35 +00:00

MIR

[DebugInfo][X86] Add start-after flags to MIR tests

2018-07-12 14:36:48 +00:00

MSP430

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Nios2

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NVPTX

finish: [FileCheck] Add -allow-deprecated-dag-overlap to failing llvm tests

2018-07-11 20:31:51 +00:00

PowerPC

[AArch64, PowerPC, x86] add more signbit math tests; NFC

2018-07-27 18:12:29 +00:00

RISCV

[RISCV] Add support for _interrupt attribute

2018-07-26 17:49:43 +00:00

SPARC

Regenerate remainder test.

2018-07-20 13:14:29 +00:00

SystemZ

[SystemZ] Test case formatting fixes

2018-07-20 12:12:10 +00:00

Thumb

[ARM] Prefer lsls+lsrs over lsls+ands or lsrs+ands in Thumb1.

2018-07-25 18:22:22 +00:00

Thumb2

[ARM] Treat cmn immediates as legal in isLegalICmpImmediate.

2018-07-10 23:44:37 +00:00

WebAssembly

[WebAssembly] Add tests for weaker memory consistency orderings

2018-07-24 21:06:44 +00:00

WinCFGuard

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WinEH

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X86

[AArch64, PowerPC, x86] add more signbit math tests; NFC

2018-07-27 18:12:29 +00:00

XCore

[DAGCombiner] extend(ifpositive(X)) -> shift-right (not X)

2018-07-15 16:27:07 +00:00