Andrea Di Biagio 749bf3be5e [MCA] Ignore invalid processor resource writes of zero cycles. NFCI ...

In debug mode, the tool also raises a warning and prints out a message which
helps identify the problematic MCWriteProcResEntry from the scheduling class.
This message would have been useful to have when triaging PR42282.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363387 91177308-0d34-0410-b5e6-96231b3b80d8

2019-06-14 13:31:21 +00:00

..

HardwareUnits

[MCA] Further refactor the bottleneck analysis view. NFCI.

2019-06-10 12:50:08 +00:00

Stages

[MCA] Refactor the logic that computes the critical memory dependency info. NFCI

2019-05-26 18:41:35 +00:00

CMakeLists.txt

[MCA] Add an experimental MicroOpQueue stage.

2019-03-29 12:15:37 +00:00

Context.cpp

[MCA] Add an experimental MicroOpQueue stage.

2019-03-29 12:15:37 +00:00

HWEventListener.cpp

Update the file headers across all of the LLVM projects in the monorepo

2019-01-19 08:50:56 +00:00

InstrBuilder.cpp

[MCA] Ignore invalid processor resource writes of zero cycles. NFCI

2019-06-14 13:31:21 +00:00

Instruction.cpp

[MCA] Refactor the logic that computes the critical memory dependency info. NFCI

2019-05-26 18:41:35 +00:00

LLVMBuild.txt

Update the file headers across all of the LLVM projects in the monorepo

2019-01-19 08:50:56 +00:00

Pipeline.cpp

[MCA] Fix -Wparentheses warning breaking the -Werror build.

2019-03-27 16:22:36 +00:00

Support.cpp

[MCA] Improved debug prints. NFC

2019-02-12 16:18:57 +00:00