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85cf93877d
There are quite some old testcases with powerpc- triple, we should add this triple support so that we can update them with script. Differential Revision: https://reviews.llvm.org/D63723 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364213 91177308-0d34-0410-b5e6-96231b3b80d8
45 lines
1.4 KiB
LLVM
45 lines
1.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names < %s -mtriple=powerpc-unknown-linux-gnu | FileCheck -check-prefix=P32 %s
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; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names < %s -mtriple=powerpc64-unknown-linux-gnu | FileCheck -check-prefix=P64 %s
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; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck -check-prefix=P64 %s
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; PR8327
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define i8* @test1(i8** %foo) nounwind {
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; P32-LABEL: test1:
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; P32: # %bb.0:
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; P32-NEXT: lbz r4, 0(r3)
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; P32-NEXT: addi r5, r4, 1
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; P32-NEXT: stb r5, 0(r3)
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; P32-NEXT: cmpwi r4, 8
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; P32-NEXT: lwz r5, 4(r3)
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; P32-NEXT: slwi r4, r4, 2
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; P32-NEXT: addi r6, r5, 4
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; P32-NEXT: bc 12, lt, .LBB0_1
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; P32-NEXT: b .LBB0_2
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; P32-NEXT: .LBB0_1:
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; P32-NEXT: addi r6, r5, 0
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; P32-NEXT: .LBB0_2:
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; P32-NEXT: stw r6, 4(r3)
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; P32-NEXT: lwz r3, 8(r3)
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; P32-NEXT: add r3, r3, r4
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; P32-NEXT: bc 12, lt, .LBB0_4
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; P32-NEXT: # %bb.3:
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; P32-NEXT: ori r3, r5, 0
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; P32-NEXT: b .LBB0_4
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; P32-NEXT: .LBB0_4:
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; P32-NEXT: lwz r3, 0(r3)
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; P32-NEXT: blr
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;
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; P64-LABEL: test1:
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; P64: # %bb.0:
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; P64-NEXT: ld r4, 0(r3)
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; P64-NEXT: addi r5, r4, 8
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; P64-NEXT: std r5, 0(r3)
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; P64-NEXT: ld r3, 0(r4)
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; P64-NEXT: blr
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%A = va_arg i8** %foo, i8*
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ret i8* %A
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}
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