Matthias Braun e607e01664 LiveIntervalAnalysis: Rework constructMainRangeFromSubranges() ...

We now use LiveRangeCalc::extendToUses() instead of a specially designed
algorithm in constructMainRangeFromSubranges():
- The original motivation for constructMainRangeFromSubranges() were
  differences between the main liverange and subranges because of hidden
  dead definitions. This case however cannot happen anymore with the
  DetectDeadLaneMasks pass in place.
- It simplifies the code.
- This fixes a longstanding bug where we did not properly create new SSA
  values on merging control flow (the MachineVerifier missed most of
  these cases).
- Move constructMainRangeFromSubranges() to LiveIntervalAnalysis and
  LiveRangeCalc to better match the implementation/available helper
  functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269016 91177308-0d34-0410-b5e6-96231b3b80d8

2016-05-10 04:51:14 +00:00

..

AArch64

[AArch64] Implement lowering of the X constraint on AArch64

2016-05-09 11:10:44 +00:00

AMDGPU

LiveIntervalAnalysis: Rework constructMainRangeFromSubranges()

2016-05-10 04:51:14 +00:00

ARM

[ARM] Fix Scavenger assert due to underestimated stack size

2016-05-08 05:11:54 +00:00

BPF

BPF: emit an error message for unsupported signed division operation

2016-03-18 22:02:47 +00:00

Generic

llc: Rework -run-pass option

2016-05-10 01:32:44 +00:00

Hexagon

[Hexagon] Treat all conditional branches as predicted (not-taken by default)

2016-05-09 18:22:07 +00:00

Inputs

[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.

2016-04-15 15:57:41 +00:00

Lanai

[lanai] Add subword scheduling itineraries.

2016-04-20 18:28:55 +00:00

Mips

[mips][micromips] Make getPointerRegClass() result depend on the instruction.

2016-05-09 13:38:25 +00:00

MIR

ARM: fix handling of SUB immediates in peephole opt.

2016-05-02 18:30:08 +00:00

MSP430

MSP430InstrInfo::loadRegFromStackSlot forgets to set register def.

2016-02-24 15:15:02 +00:00

NVPTX

[NVPTX] Fix sign/zero-extending ldg/ldu instruction selection

2016-05-02 18:12:02 +00:00

PowerPC

[Power9] Add support for -mcpu=pwr9 in the back end

2016-05-09 18:54:58 +00:00

SPARC

[Sparc] Allow taking of function address into a register.

2016-05-04 12:11:05 +00:00

SystemZ

[SystemZ] Implement backchain attribute (recommit with fix).

2016-05-05 00:37:30 +00:00

Thumb

[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.

2016-04-15 15:57:41 +00:00

Thumb2

ARM: use r7 as the frame-pointer on all MachO targets.

2016-04-11 22:27:40 +00:00

WebAssembly

[WebAssembly] Move register stackification and coloring to a late phase.

2016-05-10 04:24:02 +00:00

WinEH

[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.

2016-04-15 15:57:41 +00:00

X86

[X86][AVX512] Use the proper load/store for AVX512 registers.

2016-05-10 01:09:14 +00:00

XCore

[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.

2016-04-15 15:57:41 +00:00