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ea7c1d4e4e18cf5c5eb7dcae53458c2bfb363d21
archived-llvm/test/CodeGen/SystemZ
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Jonas Paulsson ea7c1d4e4e [SystemZ] Bugfix of CC liveness in emitMemMemWrapper (CLC). 
If DoneMBB becomes empty it must have CC added to its live-in list, since it
will fall-through into EndMBB. This happens when the CLC loop does the
complete range.

Review: Ulrich Weigand

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327834 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-19 13:05:22 +00:00
..
Large
[SystemZ] Run branch-12.ll test only if long tests enabled
2018-01-19 19:51:38 +00:00
addr-01.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
addr-02.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
addr-03.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
alias-01.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
alloca-01.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
alloca-02.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
alloca-03.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
alloca-04.ll
llvm/test/CodeGen/SystemZ/alloca-04.ll REQUIRES asserts due to -debug-pass.
2015-11-28 13:05:49 +00:00
and-01.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
and-02.ll
…
and-03.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
and-04.ll
…
and-05.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
and-06.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
and-07.ll
…
and-08.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
and-xor-01.ll
[SystemZ] Avoid generating 2 XOR instructions for (and (xor x, -1), y)
2016-06-27 15:55:30 +00:00
anyregcc-novec.ll
[SystemZ] Add support for anyregcc calling convention
2018-03-02 20:40:11 +00:00
anyregcc-vec.ll
[SystemZ] Add support for anyregcc calling convention
2018-03-02 20:40:11 +00:00
anyregcc.ll
[SystemZ] Add support for anyregcc calling convention
2018-03-02 20:40:11 +00:00
args-01.ll
[SystemZ] Add some generic (floating point support) load instructions.
2015-10-01 18:12:28 +00:00
args-02.ll
[SystemZ] Add some generic (floating point support) load instructions.
2015-10-01 18:12:28 +00:00
args-03.ll
[SystemZ] Add some generic (floating point support) load instructions.
2015-10-01 18:12:28 +00:00
args-04.ll
[SelectionDAGBuilder] Make sure DemoteReg ends up in right reg-class.
2015-11-18 14:59:00 +00:00
args-05.ll
…
args-06.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
args-07.ll
[SelectionDAGBuilder] Make sure DemoteReg ends up in right reg-class.
2015-11-18 14:59:00 +00:00
args-08.ll
[SystemZ] Support large LLVM IR struct return values
2015-08-13 13:37:06 +00:00
args-09.ll
[SystemZ] Fix ABI for i128 argument and return types
2016-02-19 14:10:21 +00:00
args-10.ll
[SystemZ] Fix ABI for i128 argument and return types
2016-02-19 14:10:21 +00:00
asm-01.ll
…
asm-02.ll
[SystemZ] Use valid base/index regs for inline asm
2016-08-18 21:44:15 +00:00
asm-03.ll
[SystemZ] Enable long displacement constraints for inline ASM operands
2016-06-09 15:19:16 +00:00
asm-04.ll
[SystemZ] Enable index register memory constraints for inline ASM
2016-06-13 14:24:05 +00:00
asm-05.ll
[SystemZ] Add support for the "o" inline asm constraint
2017-11-09 16:31:57 +00:00
asm-06.ll
…
asm-07.ll
…
asm-08.ll
…
asm-09.ll
…
asm-10.ll
…
asm-11.ll
…
asm-12.ll
…
asm-13.ll
…
asm-14.ll
…
asm-15.ll
…
asm-16.ll
…
asm-17.ll
[SystemZ] Fixes in the backend I/R.
2015-10-10 07:14:24 +00:00
asm-18.ll
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
2017-01-11 19:55:19 +00:00
asm-19.ll
[SystemZ] Support vector registers in inline asm
2018-03-02 20:36:34 +00:00
atomic-fence-01.ll
[SystemZ] Support ATOMIC_FENCE
2016-04-04 12:45:44 +00:00
atomic-fence-02.ll
[SystemZ] Support ATOMIC_FENCE
2016-04-04 12:45:44 +00:00
atomic-load-01.ll
[SystemZ] Eliminate unnecessary serialization operations
2017-08-04 18:53:35 +00:00
atomic-load-02.ll
[SystemZ] Eliminate unnecessary serialization operations
2017-08-04 18:53:35 +00:00
atomic-load-03.ll
[SystemZ] Eliminate unnecessary serialization operations
2017-08-04 18:53:35 +00:00
atomic-load-04.ll
[SystemZ] Eliminate unnecessary serialization operations
2017-08-04 18:53:35 +00:00
atomic-load-05.ll
[SystemZ] Add support for 128-bit atomic load/store/cmpxchg
2017-08-04 18:57:58 +00:00
atomic-store-01.ll
[SystemZ] Eliminate unnecessary serialization operations
2017-08-04 18:53:35 +00:00
atomic-store-02.ll
[SystemZ] Eliminate unnecessary serialization operations
2017-08-04 18:53:35 +00:00
atomic-store-03.ll
[SystemZ] Eliminate unnecessary serialization operations
2017-08-04 18:53:35 +00:00
atomic-store-04.ll
[SystemZ] Eliminate unnecessary serialization operations
2017-08-04 18:53:35 +00:00
atomic-store-05.ll
[SystemZ] Add support for 128-bit atomic load/store/cmpxchg
2017-08-04 18:57:58 +00:00
atomicrmw-add-01.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
atomicrmw-add-02.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
atomicrmw-add-03.ll
…
atomicrmw-add-04.ll
…
atomicrmw-add-05.ll
…
atomicrmw-add-06.ll
…
atomicrmw-and-01.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
atomicrmw-and-02.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
atomicrmw-and-03.ll
…
atomicrmw-and-04.ll
…
atomicrmw-and-05.ll
…
atomicrmw-and-06.ll
…
atomicrmw-minmax-01.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
atomicrmw-minmax-02.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
atomicrmw-minmax-03.ll
[IfConversion] Maintain the CFG when predicating/merging blocks in IfConvert*
2017-08-11 06:57:08 +00:00
atomicrmw-minmax-04.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
atomicrmw-nand-01.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
atomicrmw-nand-02.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
atomicrmw-nand-03.ll
…
atomicrmw-nand-04.ll
…
atomicrmw-or-01.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
atomicrmw-or-02.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
atomicrmw-or-03.ll
…
atomicrmw-or-04.ll
…
atomicrmw-or-05.ll
…
atomicrmw-or-06.ll
…
atomicrmw-sub-01.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
atomicrmw-sub-02.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
atomicrmw-sub-03.ll
…
atomicrmw-sub-04.ll
…
atomicrmw-sub-05.ll
…
atomicrmw-sub-06.ll
…
atomicrmw-xchg-01.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
atomicrmw-xchg-02.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
atomicrmw-xchg-03.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
atomicrmw-xchg-04.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
atomicrmw-xor-01.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
atomicrmw-xor-02.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
atomicrmw-xor-03.ll
…
atomicrmw-xor-04.ll
…
atomicrmw-xor-05.ll
…
atomicrmw-xor-06.ll
…
backchain.ll
[SystemZ] set 'guessInstructionProperties = 0' and set flags as needed.
2017-12-05 11:24:39 +00:00
branch-01.ll
…
branch-02.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
branch-03.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
branch-04.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
branch-05.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
branch-06.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
branch-07.ll
[SystemZ] Rework IPM sequence generation
2018-01-19 20:52:04 +00:00
branch-08.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
branch-09.ll
…
branch-10.ll
…
branch-11.ll
[SystemZ] Add support for IBM z14 processor (1/3)
2017-07-17 17:41:11 +00:00
bswap-01.ll
…
bswap-02.ll
[SystemZ] Fix test cases after r326613
2018-03-02 21:22:42 +00:00
bswap-03.ll
[SystemZ] Fix test cases after r326613
2018-03-02 21:22:42 +00:00
bswap-04.ll
[SystemZ] Fix test cases after r326613
2018-03-02 21:22:42 +00:00
bswap-05.ll
[SystemZ] Fix test cases after r326613
2018-03-02 21:22:42 +00:00
bswap-06.ll
[SystemZ] Fix test cases after r326613
2018-03-02 21:22:42 +00:00
bswap-07.ll
[SystemZ] Fix test cases after r326613
2018-03-02 21:22:42 +00:00
bswap-08.ll
[SystemZ] Fix truncstore + bswap codegen bug
2017-09-19 20:50:05 +00:00
builtins.ll
[SystemZ] Add support for llvm.thread.pointer intrinsic.
2016-04-20 01:03:48 +00:00
call-01.ll
…
call-02.ll
…
call-03.ll
[Regalloc] Generate and store multiple regalloc hints.
2017-12-05 10:52:24 +00:00
call-04.ll
[SystemZ] Support conditional sibling calls via BRCL
2016-04-08 17:22:19 +00:00
call-05.ll
[SystemZ] Support conditional indirect sibling calls via BCR
2016-04-11 12:12:32 +00:00
clear-liverange-spillreg.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
cmpxchg-01.ll
[SystemZ] Directly use CC result of compare-and-swap
2018-01-19 20:54:18 +00:00
cmpxchg-02.ll
[SystemZ] Directly use CC result of compare-and-swap
2018-01-19 20:54:18 +00:00
cmpxchg-03.ll
[SystemZ] Directly use CC result of compare-and-swap
2018-01-19 20:54:18 +00:00
cmpxchg-04.ll
[SystemZ] Directly use CC result of compare-and-swap
2018-01-19 20:54:18 +00:00
cmpxchg-05.ll
[SystemZ] Custom-expand ATOMIC_CMP_AND_SWAP_WITH_SUCCESS
2017-09-28 16:22:54 +00:00
cmpxchg-06.ll
[SystemZ] Directly use CC result of compare-and-swap
2018-01-19 20:54:18 +00:00
codegenprepare-splitstore.ll
[CodeGenPrepare] Respect endianness in splitMergedValStore.
2018-03-13 08:36:20 +00:00
cond-load-01.ll
[SystemZ] Improve use of conditional instructions
2016-11-28 13:34:08 +00:00
cond-load-02.ll
[SystemZ] Do not use LOC(G) for volatile loads
2016-10-25 15:39:15 +00:00
cond-load-03.ll
[SystemZ] Improve use of conditional instructions
2016-11-28 13:34:08 +00:00
cond-move-01.ll
[SystemZ] Improve use of conditional instructions
2016-11-28 13:34:08 +00:00
cond-move-02.ll
[SystemZ] Improve use of conditional instructions
2016-11-28 13:34:08 +00:00
cond-move-03.ll
[SystemZ] Improve use of conditional instructions
2016-11-28 13:34:08 +00:00
cond-move-04.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
cond-move-05.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
cond-store-01.ll
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
2017-01-11 19:55:19 +00:00
cond-store-02.ll
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
2017-01-11 19:55:19 +00:00
cond-store-03.ll
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
2017-01-11 19:55:19 +00:00
cond-store-04.ll
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
2017-01-11 19:55:19 +00:00
cond-store-05.ll
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
2017-01-11 19:55:19 +00:00
cond-store-06.ll
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
2017-01-11 19:55:19 +00:00
cond-store-07.ll
[SystemZ] Improve use of conditional instructions
2016-11-28 13:34:08 +00:00
cond-store-08.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
cond-store-09.ll
[SystemZ] Improve use of conditional instructions
2016-11-28 13:34:08 +00:00
copy-physreg-128.ll
[SystemZ] Make copyPhysReg() add impl-use operands of super reg.
2017-05-04 13:33:30 +00:00
ctpop-01.ll
[SystemZ] Use POPCNT instruction on z196
2015-03-31 12:56:33 +00:00
dag-combine-01.ll
[SystemZ, LoopStrengthReduce]
2017-07-21 11:59:37 +00:00
dag-combine-02.ll
[SystemZ] Prefer LOCHI over generating IPM sequences
2018-01-19 20:56:04 +00:00
dag-combine-03.ll
[SelectionDAG] Handle big endian target BITCAST in computeKnownBits()
2018-03-17 08:04:00 +00:00
DAGCombine_trunc_extract.ll
[SystemZ] Check for presence of vector support in SystemZISelLowering
2017-04-07 12:35:11 +00:00
DAGCombiner_illegal_BUILD_VECTOR.ll
[DAGCombiner] Don't make a BUILD_VECTOR with operands of illegal type.
2017-04-05 13:45:37 +00:00
DAGCombiner_isAlias.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
dyn-alloca-offset.ll
[SystemZ] Implement llvm.get.dynamic.area.offset
2016-05-04 23:31:26 +00:00
expand-zext-pseudo.ll
[SystemZ] Don't drop any operands in expandZExtPseudo()
2017-03-22 06:03:32 +00:00
extract-vector-elt-zEC12.ll
[SystemZ] Skip DAGCombining of vector node for older subtargets.
2017-03-31 13:22:59 +00:00
fold-memory-op-impl.ll
[SystemZ] Don't drop MO flags in foldMemoryOperandImpl()
2017-03-21 05:49:40 +00:00
fp-abs-01.ll
[SystemZ] Add some generic (floating point support) load instructions.
2015-10-01 18:12:28 +00:00
fp-abs-02.ll
[SystemZ] Add some generic (floating point support) load instructions.
2015-10-01 18:12:28 +00:00
fp-abs-03.ll
[SystemZ] Add support for IBM z14 processor (3/3)
2017-07-17 17:44:20 +00:00
fp-abs-04.ll
[SystemZ] Add support for IBM z14 processor (3/3)
2017-07-17 17:44:20 +00:00
fp-add-01.ll
[SystemZ] Add support for IBM z14 processor (2/3)
2017-07-17 17:42:48 +00:00
fp-add-02.ll
[SystemZ] Tie operands in SystemZShorteInst if MI becomes 2-address.
2015-10-26 15:03:07 +00:00
fp-add-03.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
fp-add-04.ll
[SystemZ] Add support for IBM z14 processor (3/3)
2017-07-17 17:44:20 +00:00
fp-cmp-01.ll
[SystemZ] Add support for IBM z14 processor (2/3)
2017-07-17 17:42:48 +00:00
fp-cmp-02.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
fp-cmp-03.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
fp-cmp-04.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
fp-cmp-05.ll
DAG: Fold fneg into compare with constant into the constant
2017-01-30 17:57:28 +00:00
fp-cmp-06.ll
[SystemZ] Add support for IBM z14 processor (3/3)
2017-07-17 17:44:20 +00:00
fp-cmp-07.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
fp-const-01.ll
…
fp-const-02.ll
[SystemZ] Add some generic (floating point support) load instructions.
2015-10-01 18:12:28 +00:00
fp-const-03.ll
…
fp-const-04.ll
…
fp-const-05.ll
…
fp-const-06.ll
…
fp-const-07.ll
…
fp-const-08.ll
…
fp-const-09.ll
…
fp-const-10.ll
Re-add SystemZ SNaN test
2016-08-08 18:11:13 +00:00
fp-const-11.ll
[SystemZ] Add support for IBM z14 processor (3/3)
2017-07-17 17:44:20 +00:00
fp-conv-01.ll
[SystemZ] Add CodeGen support for scalar f64 ops in vector registers
2015-05-05 19:28:34 +00:00
fp-conv-02.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
fp-conv-03.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fp-conv-04.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fp-conv-05.ll
…
fp-conv-06.ll
…
fp-conv-07.ll
…
fp-conv-08.ll
…
fp-conv-09.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fp-conv-10.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fp-conv-11.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fp-conv-12.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fp-conv-13.ll
…
fp-conv-14.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fp-conv-15.ll
[SystemZ] Add support for IBM z14 processor (3/3)
2017-07-17 17:44:20 +00:00
fp-conv-16.ll
[SystemZ] Add support for IBM z14 processor (3/3)
2017-07-17 17:44:20 +00:00
fp-conv-17.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
fp-copysign-01.ll
[SystemZ] Fix register ordering for BinaryRRF instructions
2016-05-18 13:24:57 +00:00
fp-copysign-02.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
fp-div-01.ll
[SystemZ] Add support for IBM z14 processor (2/3)
2017-07-17 17:42:48 +00:00
fp-div-02.ll
[SystemZ] Add CodeGen support for scalar f64 ops in vector registers
2015-05-05 19:28:34 +00:00
fp-div-03.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
fp-div-04.ll
[SystemZ] Add support for IBM z14 processor (3/3)
2017-07-17 17:44:20 +00:00
fp-libcall.ll
[SystemZ] Fix expansion of ISD::FPOW and ISD::FSINCOS
2015-09-21 17:35:45 +00:00
fp-move-01.ll
[SystemZ] Avoid LER on z13 due to partial register dependencies
2016-03-14 13:50:03 +00:00
fp-move-02.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fp-move-03.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fp-move-04.ll
[SystemZ] Add CodeGen support for scalar f64 ops in vector registers
2015-05-05 19:28:34 +00:00
fp-move-05.ll
[SystemZ] Also clear kill flag for index reg in splitMove().
2015-10-26 15:03:41 +00:00
fp-move-06.ll
…
fp-move-07.ll
[SystemZ] Add CodeGen support for scalar f64 ops in vector registers
2015-05-05 19:28:34 +00:00
fp-move-08.ll
…
fp-move-09.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
fp-move-10.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
fp-move-11.ll
[SystemZ] Add CodeGen support for scalar f64 ops in vector registers
2015-05-05 19:28:34 +00:00
fp-move-12.ll
[SystemZ] Avoid LER on z13 due to partial register dependencies
2016-03-14 13:50:03 +00:00
fp-move-13.ll
[DAG] Do MergeConsecutiveStores again before Instruction Selection
2017-11-27 15:28:15 +00:00
fp-mul-01.ll
[SystemZ] Add support for IBM z14 processor (2/3)
2017-07-17 17:42:48 +00:00
fp-mul-02.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fp-mul-03.ll
[SystemZ] Add CodeGen support for scalar f64 ops in vector registers
2015-05-05 19:28:34 +00:00
fp-mul-04.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fp-mul-05.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
fp-mul-06.ll
[SystemZ] Add support for IBM z14 processor (2/3)
2017-07-17 17:42:48 +00:00
fp-mul-07.ll
[SystemZ] Add CodeGen support for scalar f64 ops in vector registers
2015-05-05 19:28:34 +00:00
fp-mul-08.ll
[SystemZ] Add support for IBM z14 processor (2/3)
2017-07-17 17:42:48 +00:00
fp-mul-09.ll
[SystemZ] Add CodeGen support for scalar f64 ops in vector registers
2015-05-05 19:28:34 +00:00
fp-mul-10.ll
[SystemZ] Add support for IBM z14 processor (2/3)
2017-07-17 17:42:48 +00:00
fp-mul-11.ll
[SystemZ] Add support for IBM z14 processor (3/3)
2017-07-17 17:44:20 +00:00
fp-mul-12.ll
[SystemZ] Add support for IBM z14 processor (3/3)
2017-07-17 17:44:20 +00:00
fp-neg-01.ll
[SystemZ] Add some generic (floating point support) load instructions.
2015-10-01 18:12:28 +00:00
fp-neg-02.ll
[SystemZ] Add support for IBM z14 processor (3/3)
2017-07-17 17:44:20 +00:00
fp-round-01.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fp-round-02.ll
[SystemZ] Add CodeGen support for scalar f64 ops in vector registers
2015-05-05 19:28:34 +00:00
fp-round-03.ll
[SystemZ] Add support for IBM z14 processor (3/3)
2017-07-17 17:44:20 +00:00
fp-sincos-01.ll
[SelectionDAG] Allow sin/cos -> sincos optimization on GNU triples w/ just -fno-math-errno
2017-06-12 17:15:41 +00:00
fp-sqrt-01.ll
[SystemZ] Add support for IBM z14 processor (2/3)
2017-07-17 17:42:48 +00:00
fp-sqrt-02.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
fp-sqrt-03.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fp-sqrt-04.ll
[SystemZ] Add support for IBM z14 processor (3/3)
2017-07-17 17:44:20 +00:00
fp-sub-01.ll
[SystemZ] Add support for IBM z14 processor (2/3)
2017-07-17 17:42:48 +00:00
fp-sub-02.ll
[SystemZ] Add CodeGen support for scalar f64 ops in vector registers
2015-05-05 19:28:34 +00:00
fp-sub-03.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
fp-sub-04.ll
[SystemZ] Add support for IBM z14 processor (3/3)
2017-07-17 17:44:20 +00:00
fpc-intrinsics.ll
[SystemZ] Support floating-point control register instructions
2016-12-02 18:21:53 +00:00
frame-01.ll
…
frame-02.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
frame-03.ll
[SystemZ] Add CodeGen support for scalar f64 ops in vector registers
2015-05-05 19:28:34 +00:00
frame-04.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
frame-05.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
frame-06.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
frame-07.ll
[SystemZ] Add CodeGen support for scalar f64 ops in vector registers
2015-05-05 19:28:34 +00:00
frame-08.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
frame-09.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
frame-10.ll
…
frame-11.ll
…
frame-13.ll
Revert "RegScavenging: Add scavengeRegisterBackwards()"
2016-07-20 00:21:32 +00:00
frame-14.ll
Revert "RegScavenging: Add scavengeRegisterBackwards()"
2016-07-20 00:21:32 +00:00
frame-15.ll
Revert "RegScavenging: Add scavengeRegisterBackwards()"
2016-07-20 00:21:32 +00:00
frame-16.ll
Revert "RegScavenging: Add scavengeRegisterBackwards()"
2016-07-20 00:21:32 +00:00
frame-17.ll
[SystemZ] Add CodeGen support for scalar f64 ops in vector registers
2015-05-05 19:28:34 +00:00
frame-18.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
frame-19.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
frame-20.ll
[SystemZ] Add CodeGen support for scalar f64 ops in vector registers
2015-05-05 19:28:34 +00:00
frame-21.ll
[SystemZ] Fix missing emergency spill slot corner case
2017-06-26 16:50:32 +00:00
frameaddr-01.ll
[SystemZ] Support llvm.frameaddress/llvm.returnaddress intrinsics
2016-04-04 12:44:55 +00:00
htm-intrinsics.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
insert-01.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
insert-02.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
insert-03.ll
…
insert-04.ll
…
insert-05.ll
[DAGCombiner] When combining zero_extend of a truncate, only mask before extending for vectors.
2018-03-01 22:32:25 +00:00
insert-06.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-abs-01.ll
…
int-add-01.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-add-02.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-add-03.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-add-04.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-add-05.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-add-06.ll
…
int-add-07.ll
…
int-add-08.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-add-09.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-add-10.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-add-11.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-add-12.ll
[foldMemoryOperand()] Pass LiveIntervals to enable liveness check.
2016-05-10 08:09:37 +00:00
int-add-13.ll
…
int-add-14.ll
…
int-add-15.ll
…
int-add-16.ll
…
int-add-17.ll
[SystemZ] Add support for IBM z14 processor (1/3)
2017-07-17 17:41:11 +00:00
int-cmp-01.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-02.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-03.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-04.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-05.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-06.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-07.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-08.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-09.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-10.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-11.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-12.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-13.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-14.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-15.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-16.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-17.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-18.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-19.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-20.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-21.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-22.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-23.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-24.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-25.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-26.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-27.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-28.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-29.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-30.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-31.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-32.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-33.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-34.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-35.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-36.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-37.ll
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
2017-01-11 19:55:19 +00:00
int-cmp-38.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-39.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-40.ll
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
2017-01-11 19:55:19 +00:00
int-cmp-41.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-42.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-43.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-44.ll
CodeGen: Allow small copyable blocks to "break" the CFG.
2017-01-31 23:48:32 +00:00
int-cmp-45.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-cmp-46.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
int-cmp-47.ll
[SystemZ] Validate shifted compare value in adjustForTestUnderMask
2017-12-05 19:42:07 +00:00
int-cmp-48.ll
[SystemZ, MachineScheduler] Improve post-RA scheduling.
2017-08-17 08:33:44 +00:00
int-cmp-49.ll
…
int-cmp-50.ll
[SystemZ] Fix LLVM crash on unoptimized code
2015-03-30 13:46:59 +00:00
int-cmp-51.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
int-cmp-52.ll
[SystemZ] Fix assertion failure in adjustSubwordCmp
2015-12-16 18:04:06 +00:00
int-cmp-53.ll
[SystemZ] Fix wrong-code generation for certain always-false conditions
2016-02-01 18:31:19 +00:00
int-cmp-54.ll
[SystemZ] Add a check against zero before calling getTestUnderMaskCond()
2017-06-26 13:38:27 +00:00
int-const-01.ll
…
int-const-02.ll
[SystemZ] Do not crash when selecting an OR of two constants
2017-11-14 20:00:34 +00:00
int-const-03.ll
…
int-const-04.ll
…
int-const-05.ll
…
int-const-06.ll
…
int-conv-01.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-conv-02.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-conv-03.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-conv-04.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-conv-05.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-conv-06.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-conv-07.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-conv-08.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-conv-09.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-conv-10.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-conv-11.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-conv-12.ll
[SystemZ] Use LLGT(R) instructions
2016-11-11 12:43:51 +00:00
int-conv-13.ll
[SystemZ] Support load-and-zero-rightmost-byte facility
2016-11-11 12:46:28 +00:00
int-div-01.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
int-div-02.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
int-div-03.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
int-div-04.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
int-div-05.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
int-div-06.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
int-move-01.ll
…
int-move-02.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-move-03.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-move-04.ll
…
int-move-05.ll
…
int-move-06.ll
…
int-move-07.ll
…
int-move-08.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-move-09.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-mul-01.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-mul-02.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-mul-03.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-mul-04.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-mul-05.ll
…
int-mul-06.ll
…
int-mul-07.ll
…
int-mul-08.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
int-mul-09.ll
[SystemZ] Add support for IBM z14 processor (1/3)
2017-07-17 17:41:11 +00:00
int-mul-10.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
int-mul-11.ll
[SystemZ] Add support for IBM z14 processor (1/3)
2017-07-17 17:41:11 +00:00
int-neg-01.ll
…
int-neg-02.ll
…
int-sub-01.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-sub-02.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-sub-03.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-sub-04.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-sub-05.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-sub-06.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-sub-07.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
int-sub-08.ll
…
int-sub-09.ll
…
int-sub-10.ll
[SystemZ] Add support for IBM z14 processor (1/3)
2017-07-17 17:41:11 +00:00
knownbits-intrinsics-binop.ll
[SystemZ] computeKnownBitsForTargetNode() / ComputeNumSignBitsForTargetNode()
2018-03-17 08:32:12 +00:00
knownbits-intrinsics-unpack.ll
[SystemZ] computeKnownBitsForTargetNode() / ComputeNumSignBitsForTargetNode()
2018-03-17 08:32:12 +00:00
knownbits.ll
[SystemZ] computeKnownBitsForTargetNode() / ComputeNumSignBitsForTargetNode()
2018-03-17 08:32:12 +00:00
la-01.ll
…
la-02.ll
…
la-03.ll
…
la-04.ll
…
list-ilp-crash.ll
[SystemZ] Implement getRepRegClassFor()
2017-05-10 13:03:25 +00:00
lit.local.cfg
…
load-and-test.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
locr-legal-regclass.ll
[SystemZ] Make sure of correct regclasses in insertSelect()
2017-03-31 14:06:59 +00:00
loop-01.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
loop-02.ll
[SystemZ] Add remaining branch instructions
2016-11-28 13:40:08 +00:00
loop-03.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
loop-04.ll
[SystemZ] Check the bitwidth before calling isInt/isUInt.
2018-01-31 12:41:25 +00:00
lower-copy-undef-src.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
mature-mc-support.ll
[LLC] Add an inline assembly diagnostics handler.
2017-02-03 11:14:39 +00:00
memchr-01.ll
[TLI] Robustize SDAG LibFunc proto checking by merging it into TLI.
2017-02-03 19:11:19 +00:00
memchr-nobuiltin.ll
[SelectionDAG] Don't treat library calls specially if marked with nobuiltin.
2016-06-17 20:24:07 +00:00
memcmp-01.ll
[SystemZ] Implement conditional returns
2016-04-07 16:11:44 +00:00
memcmp-02.ll
[SystemZ] Bugfix of CC liveness in emitMemMemWrapper (CLC).
2018-03-19 13:05:22 +00:00
memcmp-nobuiltin.ll
[SelectionDAG] Don't treat library calls specially if marked with nobuiltin.
2016-06-17 20:24:07 +00:00
memcpy-01.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
memcpy-02.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
memset-01.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
memset-02.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
memset-03.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
memset-04.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
or-01.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
or-02.ll
…
or-03.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
or-04.ll
…
or-05.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
or-06.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
or-07.ll
…
or-08.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
patchpoint-invoke.ll
[SystemZ] Support stackmaps and patchpoints
2018-03-02 20:39:30 +00:00
patchpoint.ll
[SystemZ] Support stackmaps and patchpoints
2018-03-02 20:39:30 +00:00
pie.ll
Uses shouldAssumeDSOLocal.
2016-06-23 21:18:59 +00:00
pr31710.ll
SDAG: Update ChainNodesMatched during UpdateChains if a node is replaced
2017-01-30 18:29:46 +00:00
pr32372.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr32505.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
pr36164.ll
[SelectionDAG] Fix UpdateChains handling of TokenFactors
2018-02-01 16:11:59 +00:00
prefetch-01.ll
…
RAbasic-invalid-LR-update.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
regalloc-fast-invalid-kill-flag.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
regalloc-GR128.ll
[SystemZ] implement shouldCoalesce()
2017-09-29 14:31:39 +00:00
ret-addr-01.ll
[SystemZ] Support llvm.frameaddress/llvm.returnaddress intrinsics
2016-04-04 12:44:55 +00:00
risbg-01.ll
[SystemZ] set 'guessInstructionProperties = 0' and set flags as needed.
2017-12-05 11:24:39 +00:00
risbg-02.ll
[SystemZ] Recognize RISBG opportunities involving a truncate
2016-06-22 16:16:27 +00:00
risbg-03.ll
[SystemZ] Support RISBGN instruction on zEC12
2015-03-31 12:58:17 +00:00
risbg-04.ll
[SystemZ] Fix invalid codegen using RISBMux on out-of-range bits
2017-11-14 19:20:46 +00:00
rnsbg-01.ll
…
rosbg-01.ll
…
rosbg-02.ll
[SystemZ] Bugfix in expandRxSBG()
2017-12-06 13:53:24 +00:00
rot-01.ll
[SystemZ] Remove AND mask of bottom 6 bits when result is used for shift/rotate
2016-07-06 18:13:11 +00:00
rot-02.ll
[SystemZ] Remove AND mask of bottom 6 bits when result is used for shift/rotate
2016-07-06 18:13:11 +00:00
rxsbg-01.ll
…
selectcc-01.ll
…
selectcc-02.ll
…
selectcc-03.ll
…
setcc-01.ll
…
setcc-02.ll
…
setcc-03.ll
[SystemZ] Rework IPM sequence generation
2018-01-19 20:52:04 +00:00
setcc-04.ll
[SystemZ] Rework IPM sequence generation
2018-01-19 20:52:04 +00:00
shift-01.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
shift-02.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
shift-03.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
shift-04.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
shift-05.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
shift-06.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
shift-07.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
shift-08.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
shift-09.ll
…
shift-10.ll
[DAG] optimize negation of bool
2016-10-19 16:58:59 +00:00
shift-11.ll
Fix SystemZ compilation abort caused by negative AND mask
2016-08-18 18:04:26 +00:00
shift-12.ll
[SystemZ] Remove AND mask of bottom 6 bits when result is used for shift/rotate
2016-07-06 18:13:11 +00:00
signbits-intrinsics-binop.ll
[SystemZ] computeKnownBitsForTargetNode() / ComputeNumSignBitsForTargetNode()
2018-03-17 08:32:12 +00:00
signbits-intrinsics-unpack.ll
[SystemZ] computeKnownBitsForTargetNode() / ComputeNumSignBitsForTargetNode()
2018-03-17 08:32:12 +00:00
signbits.ll
[SystemZ] Add 'REQUIRES: asserts' to test case using debug output.
2018-03-17 09:15:13 +00:00
spill-01.ll
[MachineVerifier] Analyze MachineMemOperands for mem-to-mem moves.
2015-10-29 08:28:35 +00:00
splitMove_undefReg_mverifier_2.ll
[SystemZ] Update kill-flag in splitMove().
2017-04-24 12:40:28 +00:00
splitMove_undefReg_mverifier.ll
[SystemZ] Add use of super-reg in splitMove()
2017-03-17 06:47:08 +00:00
stack-guard.ll
Add address space mangling to lifetime intrinsics
2017-04-10 20:18:21 +00:00
stack-size-section.ll
[SystemZ] Fix common-code users of stack size
2018-03-02 20:38:41 +00:00
stackmap-nops.ll
[SystemZ] Support stackmaps and patchpoints
2018-03-02 20:39:30 +00:00
stackmap-shadow-optimization.ll
[SystemZ] Support stackmaps and patchpoints
2018-03-02 20:39:30 +00:00
stackmap.ll
[SystemZ] Support stackmaps and patchpoints
2018-03-02 20:39:30 +00:00
store_nonbytesized_vecs.ll
[SelectionDAG] Consider endianness in scalarizeVectorStore().
2018-02-02 08:48:02 +00:00
strcmp-01.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
strcmp-nobuiltin.ll
[SelectionDAG] Don't treat library calls specially if marked with nobuiltin.
2016-06-17 20:24:07 +00:00
strcpy-01.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
strcpy-nobuiltin.ll
[SelectionDAG] Don't treat library calls specially if marked with nobuiltin.
2016-06-17 20:24:07 +00:00
strlen-01.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
strlen-nobuiltin.ll
[SelectionDAG] Don't treat library calls specially if marked with nobuiltin.
2016-06-17 20:24:07 +00:00
swift-return.ll
[Regalloc] Generate and store multiple regalloc hints.
2017-12-05 10:52:24 +00:00
swifterror.ll
[Regalloc] Generate and store multiple regalloc hints.
2017-12-05 10:52:24 +00:00
swiftself.ll
[SystemZ] Support Swift Calling Convention
2016-04-28 00:17:23 +00:00
tail-call-mem-intrinsics.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
tdc-01.ll
[SystemZ] Utilize Test Data Class instructions.
2016-07-10 14:41:22 +00:00
tdc-02.ll
[SystemZ] Utilize Test Data Class instructions.
2016-07-10 14:41:22 +00:00
tdc-03.ll
[SystemZ] Utilize Test Data Class instructions.
2016-07-10 14:41:22 +00:00
tdc-04.ll
[SystemZ] Utilize Test Data Class instructions.
2016-07-10 14:41:22 +00:00
tdc-05.ll
[SystemZ] Utilize Test Data Class instructions.
2016-07-10 14:41:22 +00:00
tdc-06.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
tdc-07.ll
[SystemZ] Add support for IBM z14 processor (3/3)
2017-07-17 17:44:20 +00:00
tls-01.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
tls-02.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
tls-03.ll
…
tls-04.ll
…
tls-05.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
tls-06.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
tls-07.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
trap-01.ll
[SystemZ] Support Compare and Traps
2016-06-10 19:58:10 +00:00
trap-02.ll
[SystemZ] Fix trap issue and enable expensive checks.
2017-06-23 14:30:46 +00:00
trap-03.ll
[SystemZ] Support load-and-trap instructions
2016-11-28 13:59:22 +00:00
trap-04.ll
[SystemZ] Support load-and-trap instructions
2016-11-28 13:59:22 +00:00
trap-05.ll
[SystemZ] Support load-and-trap instructions
2016-11-28 13:59:22 +00:00
twoaddr-sink.ll
[SystemZ] set 'guessInstructionProperties = 0' and set flags as needed.
2017-12-05 11:24:39 +00:00
unaligned-01.ll
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
2017-03-14 00:34:14 +00:00
undef-flag.ll
Fixed parser error on windows shell evaluation of RUN script line
2017-01-18 11:40:28 +00:00
vec-abi-align.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-abs-01.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-abs-02.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-abs-03.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-abs-04.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-abs-05.ll
[SystemZ] Add CodeGen support for scalar f64 ops in vector registers
2015-05-05 19:28:34 +00:00
vec-abs-06.ll
[SystemZ] Add support for IBM z14 processor (2/3)
2017-07-17 17:42:48 +00:00
vec-add-01.ll
[SystemZ] Add CodeGen support for scalar f64 ops in vector registers
2015-05-05 19:28:34 +00:00
vec-add-02.ll
[SystemZ] Add support for IBM z14 processor (2/3)
2017-07-17 17:42:48 +00:00
vec-and-01.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-and-02.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-and-03.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-and-04.ll
[SystemZ] Add support for IBM z14 processor (1/3)
2017-07-17 17:41:11 +00:00
vec-args-01.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-args-02.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-args-03.ll
[SystemZ] Handle sub-128 vectors
2015-05-05 19:29:21 +00:00
vec-args-04.ll
Make MergeConsecutiveStores look at other stores on same chain
2015-08-28 17:31:28 +00:00
vec-args-05.ll
Make MergeConsecutiveStores look at other stores on same chain
2015-08-28 17:31:28 +00:00
vec-args-06.ll
[SystemZ] Post-RA scheduler implementation
2016-10-20 08:27:16 +00:00
vec-args-07.ll
[SystemZ] Support large LLVM IR struct return values
2015-08-13 13:37:06 +00:00
vec-args-error-01.ll
[SystemZ] Mark v1i128 and v1f128 as unsupported
2015-05-05 19:30:05 +00:00
vec-args-error-02.ll
[SystemZ] Mark v1i128 and v1f128 as unsupported
2015-05-05 19:30:05 +00:00
vec-args-error-03.ll
[SystemZ] Mark v1i128 and v1f128 as unsupported
2015-05-05 19:30:05 +00:00
vec-args-error-04.ll
[SystemZ] Mark v1i128 and v1f128 as unsupported
2015-05-05 19:30:05 +00:00
vec-args-error-05.ll
[SystemZ] Mark v1i128 and v1f128 as unsupported
2015-05-05 19:30:05 +00:00
vec-args-error-06.ll
[SystemZ] Mark v1i128 and v1f128 as unsupported
2015-05-05 19:30:05 +00:00
vec-args-error-07.ll
[SystemZ] Mark v1i128 and v1f128 as unsupported
2015-05-05 19:30:05 +00:00
vec-args-error-08.ll
[SystemZ] Mark v1i128 and v1f128 as unsupported
2015-05-05 19:30:05 +00:00
vec-cmp-01.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-cmp-02.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-cmp-03.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-cmp-04.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-cmp-05.ll
[SystemZ] Add CodeGen support for v4f32
2015-05-05 19:27:45 +00:00
vec-cmp-06.ll
[SystemZ] Add CodeGen support for scalar f64 ops in vector registers
2015-05-05 19:28:34 +00:00
vec-cmp-07.ll
[SystemZ] Add support for IBM z14 processor (2/3)
2017-07-17 17:42:48 +00:00
vec-cmp-cmp-logic-select.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec-cmpsel.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec-combine-01.ll
[SystemZ] Handle sub-128 vectors
2015-05-05 19:29:21 +00:00
vec-combine-02.ll
[SystemZ] Handle sub-128 vectors
2015-05-05 19:29:21 +00:00
vec-const-01.ll
[SystemZ] Handle sub-128 vectors
2015-05-05 19:29:21 +00:00
vec-const-02.ll
[SystemZ] Handle sub-128 vectors
2015-05-05 19:29:21 +00:00
vec-const-03.ll
[SystemZ] Handle sub-128 vectors
2015-05-05 19:29:21 +00:00
vec-const-04.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-const-05.ll
[SystemZ] Handle sub-128 vectors
2015-05-05 19:29:21 +00:00
vec-const-06.ll
[SystemZ] Add CodeGen support for v2f64
2015-05-05 19:26:48 +00:00
vec-const-07.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-const-08.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-const-09.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-const-10.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-const-11.ll
[SystemZ] Add CodeGen support for v4f32
2015-05-05 19:27:45 +00:00
vec-const-12.ll
[SystemZ] Add CodeGen support for v2f64
2015-05-05 19:26:48 +00:00
vec-const-13.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-const-14.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-const-15.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-const-16.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-const-17.ll
[SystemZ] Add CodeGen support for v4f32
2015-05-05 19:27:45 +00:00
vec-const-18.ll
[SystemZ] Add CodeGen support for v2f64
2015-05-05 19:26:48 +00:00
vec-conv-01.ll
[SystemZ] Add CodeGen support for v2f64
2015-05-05 19:26:48 +00:00
vec-conv-02.ll
[SystemZ] Add CodeGen support for scalar f64 ops in vector registers
2015-05-05 19:28:34 +00:00
vec-ctlz-01.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-ctpop-01.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-ctpop-02.ll
[SystemZ] Add support for IBM z14 processor (1/3)
2017-07-17 17:41:11 +00:00
vec-cttz-01.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-div-01.ll
[SystemZ] Enable machine scheduler.
2017-10-06 13:59:28 +00:00
vec-div-02.ll
[SystemZ] Add support for IBM z14 processor (2/3)
2017-07-17 17:42:48 +00:00
vec-extract-01.ll
[DAGCombiner] Fix ReplaceExtractVectorEltOfLoadWithNarrowedLoad for BE
2015-05-05 19:33:37 +00:00
vec-extract-02.ll
[SystemZ] Let z13 also support FeatureMiscellaneousExtensions.
2016-06-30 07:13:56 +00:00
vec-intrinsics-01.ll
[SystemZ] Also update the CHECK line for VPDI
2018-02-23 13:22:46 +00:00
vec-intrinsics-02.ll
[SystemZ] Prefer LOCHI over generating IPM sequences
2018-01-19 20:56:04 +00:00
vec-load-element.ll
[SelectionDAGBuilder] Chain prefetches less aggressively.
2018-01-10 09:33:00 +00:00
vec-log-01.ll
[SystemZ] Add CodeGen support for v2f64
2015-05-05 19:26:48 +00:00
vec-max-01.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-max-02.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-max-03.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-max-04.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-max-05.ll
[SystemZ] Add support for IBM z14 processor (3/3)
2017-07-17 17:44:20 +00:00
vec-min-01.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-min-02.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-min-03.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-min-04.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-min-05.ll
[SystemZ] Add support for IBM z14 processor (3/3)
2017-07-17 17:44:20 +00:00
vec-move-01.ll
[SystemZ] Handle sub-128 vectors
2015-05-05 19:29:21 +00:00
vec-move-02.ll
[LegalizeVectorTypes] Allow single loads and stores for more short vectors
2015-05-05 19:32:57 +00:00
vec-move-03.ll
[LegalizeVectorTypes] Allow single loads and stores for more short vectors
2015-05-05 19:32:57 +00:00
vec-move-04.ll
[SystemZ] Add CodeGen support for v4f32
2015-05-05 19:27:45 +00:00
vec-move-05.ll
[SystemZ] Add CodeGen support for v4f32
2015-05-05 19:27:45 +00:00
vec-move-06.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-move-07.ll
[SystemZ] Add CodeGen support for v4f32
2015-05-05 19:27:45 +00:00
vec-move-08.ll
[SystemZ] Add CodeGen support for v4f32
2015-05-05 19:27:45 +00:00
vec-move-09.ll
[SystemZ] Add CodeGen support for v4f32
2015-05-05 19:27:45 +00:00
vec-move-10.ll
[SystemZ] Add CodeGen support for v4f32
2015-05-05 19:27:45 +00:00
vec-move-11.ll
[SystemZ] Add CodeGen support for v4f32
2015-05-05 19:27:45 +00:00
vec-move-12.ll
[SystemZ] Add CodeGen support for v4f32
2015-05-05 19:27:45 +00:00
vec-move-13.ll
[SystemZ] Handle sub-128 vectors
2015-05-05 19:29:21 +00:00
vec-move-14.ll
[SystemZ] Add CodeGen support for v4f32
2015-05-05 19:27:45 +00:00
vec-move-15.ll
[LegalizeVectorTypes] Allow single loads and stores for more short vectors
2015-05-05 19:32:57 +00:00
vec-move-16.ll
[LegalizeVectorTypes] Allow single loads and stores for more short vectors
2015-05-05 19:32:57 +00:00
vec-move-17.ll
[SelectionDAG] Consider endianness in scalarizeVectorStore().
2018-02-02 08:48:02 +00:00
vec-move-18.ll
[SystemZ] Add support for IBM z14 processor (1/3)
2017-07-17 17:41:11 +00:00
vec-mul-01.ll
[SystemZ] Add CodeGen support for scalar f64 ops in vector registers
2015-05-05 19:28:34 +00:00
vec-mul-02.ll
[SystemZ] Add CodeGen support for v2f64
2015-05-05 19:26:48 +00:00
vec-mul-03.ll
[SystemZ] Add support for IBM z14 processor (2/3)
2017-07-17 17:42:48 +00:00
vec-mul-04.ll
[SystemZ] Add support for IBM z14 processor (2/3)
2017-07-17 17:42:48 +00:00
vec-mul-05.ll
[SystemZ] Add support for IBM z14 processor (2/3)
2017-07-17 17:42:48 +00:00
vec-neg-01.ll
[SystemZ] Add CodeGen support for scalar f64 ops in vector registers
2015-05-05 19:28:34 +00:00
vec-neg-02.ll
[SystemZ] Add support for IBM z14 processor (2/3)
2017-07-17 17:42:48 +00:00
vec-or-01.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-or-02.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-or-03.ll
[SystemZ] Add support for IBM z14 processor (1/3)
2017-07-17 17:41:11 +00:00
vec-perm-01.ll
[SystemZ] Add CodeGen support for v4f32
2015-05-05 19:27:45 +00:00
vec-perm-02.ll
[SystemZ] Add CodeGen support for v4f32
2015-05-05 19:27:45 +00:00
vec-perm-03.ll
[SystemZ] Add CodeGen support for v4f32
2015-05-05 19:27:45 +00:00
vec-perm-04.ll
[SystemZ] Add CodeGen support for v4f32
2015-05-05 19:27:45 +00:00
vec-perm-05.ll
[SystemZ] Add CodeGen support for v4f32
2015-05-05 19:27:45 +00:00
vec-perm-06.ll
[SystemZ] Add CodeGen support for v4f32
2015-05-05 19:27:45 +00:00
vec-perm-07.ll
[SystemZ] Add CodeGen support for v4f32
2015-05-05 19:27:45 +00:00
vec-perm-08.ll
[SystemZ] Add CodeGen support for v4f32
2015-05-05 19:27:45 +00:00
vec-perm-09.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-perm-10.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-perm-11.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-perm-12.ll
[SystemZ] Post-RA scheduler implementation
2016-10-20 08:27:16 +00:00
vec-perm-13.ll
[DAG] Remove isVectorClearMaskLegal() check from vector_build dagcombine
2016-09-28 06:13:58 +00:00
vec-round-01.ll
[SystemZ] Add CodeGen support for scalar f64 ops in vector registers
2015-05-05 19:28:34 +00:00
vec-round-02.ll
[SystemZ] Add support for IBM z14 processor (2/3)
2017-07-17 17:42:48 +00:00
vec-sext.ll
[DAGTypeLegalizer] Handle SIGN/ZERO_EXTEND in WidenVecRes_Convert().
2017-01-27 07:46:26 +00:00
vec-shift-01.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-shift-02.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-shift-03.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-shift-04.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-shift-05.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-shift-06.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-shift-07.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-sqrt-01.ll
[SystemZ] Add CodeGen support for scalar f64 ops in vector registers
2015-05-05 19:28:34 +00:00
vec-sqrt-02.ll
[SystemZ] Add support for IBM z14 processor (2/3)
2017-07-17 17:42:48 +00:00
vec-sub-01.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
vec-sub-02.ll
[SystemZ] Add support for IBM z14 processor (2/3)
2017-07-17 17:42:48 +00:00
vec-trunc-to-i1.ll
[SystemZ] computeKnownBitsForTargetNode() / ComputeNumSignBitsForTargetNode()
2018-03-17 08:32:12 +00:00
vec-xor-01.ll
[SystemZ] Add CodeGen support for integer vector types
2015-05-05 19:25:42 +00:00
vec-xor-02.ll
[SystemZ] Add support for IBM z14 processor (1/3)
2017-07-17 17:41:11 +00:00
vec-zext.ll
[DAGTypeLegalizer] Handle SIGN/ZERO_EXTEND in WidenVecRes_Convert().
2017-01-27 07:46:26 +00:00
vectorizer-output-3xi32.ll
[SystemZ] Add check VT.isSimple() in canTreateAsByteVector()
2017-03-07 09:49:31 +00:00
xor-01.ll
Let MachineVerifier be aware of mem-to-mem instructions.
2015-10-21 07:39:47 +00:00
xor-02.ll
…
xor-03.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
xor-04.ll
…
xor-05.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
xor-06.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
xor-07.ll
…
xor-08.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00