Yaxun Liu eb711fee66 CodeGen: Fix TargetLowering::LowerCallTo for sret value type ...

TargetLowering::LowerCallTo assumes that sret value type corresponds to a
pointer in default address space, which is incorrect, since sret value type
should correspond to a pointer in alloca address space, which may not
be the default address space. This causes assertion for amdgcn target
in amdgiz environment.

This patch fixes that.

Differential Revision: https://reviews.llvm.org/D39996


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318167 91177308-0d34-0410-b5e6-96231b3b80d8

2017-11-14 18:46:52 +00:00

..

AArch64

[globalisel][tablegen] Add support for extload.

2017-11-13 18:30:23 +00:00

AMDGPU

CodeGen: Fix TargetLowering::LowerCallTo for sret value type

2017-11-14 18:46:52 +00:00

ARC

[ARC] Add ARC backend.

2017-08-24 15:40:33 +00:00

ARM

ARM: correctly update CFG when splitting BB to fix branch.

2017-11-14 11:43:54 +00:00

AVR

[AVR] Remove the select-mbb-placement-bug.ll test

2017-11-14 04:32:49 +00:00

BPF

bpf: fix bug on silently truncating 64-bit immediate

2017-10-16 04:14:53 +00:00

Generic

Add an @llvm.sideeffect intrinsic

2017-11-08 21:59:51 +00:00

Hexagon

[Hexagon] Prefer L2_loadrub_io over L4_loadrub_rr

2017-11-02 21:56:59 +00:00

Inputs

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Lanai

MIR: Print the register class or bank in vreg defs

2017-10-24 18:04:54 +00:00

Mips

[mips] Correct microMIP's jump and add unconditional branch pseudo

2017-11-09 16:02:18 +00:00

MIR

[MIRPrinter] Use %subreg.xxx syntax for subregister index operands

2017-11-06 21:46:06 +00:00

MSP430

…

Nios2

…

NVPTX

[NVPTX] Implement __nvvm_atom_add_gen_d builtin.

2017-11-07 22:10:54 +00:00

PowerPC

Use new vector insert half-word and byte instructions when we see insertelement on '8 x i16' and '16 x i8' types. Also extended existing lit testcase to cover these cases.

2017-11-07 20:55:43 +00:00

RISCV

[RISCV] Re-generate test/CodeGen/RISCV/alu32.ll using update_llc_test_checks.py

2017-11-09 15:45:42 +00:00

SPARC

Revert "Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding""

2017-10-03 16:59:13 +00:00

SystemZ

[RegAlloc, SystemZ] Increase number of LOCRs by passing "hard" regalloc hints.

2017-11-10 08:46:26 +00:00

Thumb

[ARM] Fix incorrect conversion of a tail call to an ordinary call

2017-11-14 10:36:52 +00:00

Thumb2

[arm] Fix Unnecessary reloads from GOT.

2017-11-13 20:45:38 +00:00

WebAssembly

Use input redirection in WebAssembly/comdat.ll test.

2017-11-14 14:26:42 +00:00

WinEH

Make x86 __ehhandler comdat if parent function is

2017-10-20 17:04:43 +00:00

X86

[X86][AVX] Add scheduling test for vmovntdq 256-bit store

2017-11-14 14:03:29 +00:00

XCore

[MC] Suppress .Lcfi labels when emitting textual assembly

2017-10-10 00:57:36 +00:00