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ef5bf36c741d327d2139bb3754c5cb7ec6fdbd4d
archived-llvm/include/llvm/Target
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Daniel Sanders 6bf883d664 [globalisel] Add comments indicating the operand order 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345769 91177308-0d34-0410-b5e6-96231b3b80d8
2018-10-31 19:49:37 +00:00
..
GlobalISel
[GlobalISel] Use the target preferred type for G_EXTRACT_VECTOR_ELT index.
2018-10-25 14:04:54 +00:00
CodeGenCWrappers.h
[AArch64] Add Tiny Code Model for AArch64
2018-08-22 11:31:39 +00:00
GenericOpcodes.td
[globalisel] Add comments indicating the operand order
2018-10-31 19:49:37 +00:00
Target.td
[CodeGen] Remove out operands from PATCHABLE_OP
2018-10-26 13:37:25 +00:00
TargetCallingConv.td
Remove trailing space
2018-07-30 19:41:25 +00:00
TargetInstrPredicate.td
[tblgen][PredicateExpander] Add the ability to describe more complex constraints on instruction operands.
2018-10-31 12:28:05 +00:00
TargetIntrinsicInfo.h
GlobalISel: support translation of intrinsic calls.
2016-07-29 22:32:36 +00:00
TargetItinerary.td
[NFC] Fix comment of class InstrStage
2018-02-12 15:02:49 +00:00
TargetLoweringObjectFile.h
[MC] Move EH DWARF encodings from MC to CodeGen, NFC
2018-08-09 22:24:04 +00:00
TargetMachine.h
Use unique_ptr to hold AsmInfo,MRI,MII,STI
2018-09-25 06:19:31 +00:00
TargetOptions.h
CodeGen: Add a target option for emitting .addrsig directives for all address-significant symbols.
2018-07-17 22:40:08 +00:00
TargetPfmCounters.td
[MCSched] Bind PFM Counters to the CPUs instead of the SchedModel.
2018-10-25 07:44:01 +00:00
TargetSchedule.td
[MCSched] Bind PFM Counters to the CPUs instead of the SchedModel.
2018-10-25 07:44:01 +00:00
TargetSelectionDAG.td
[Intrinsic] Signed and Unsigned Saturation Subtraction Intirnsics
2018-10-29 16:54:37 +00:00