mirror of
https://github.com/RPCS3/llvm.git
synced 2026-01-31 01:25:19 +01:00
66f94c748f
The comment for this code indicated that it should work similar to our handling of add lowering above: if we see uses of an instruction other than flag usage and store usage, it tries to avoid the specialized X86ISD::* nodes that are designed for flag+op modeling and emits an explicit test. Problem is, only the add case actually did this. In all the other cases, the logic was incomplete and inverted. Any time the value was used by a store, we bailed on the specialized X86ISD node. All of this appears to have been historical where we had different logic here. =/ Turns out, we have quite a few patterns designed around these nodes. We should actually form them. I fixed the code to match what we do for add, and it has quite a positive effect just within some of our test cases. The only thing close to a regression I see is using: notl %r testl %r, %r instead of: xorl -1, %r But we can add a pattern or something to fold that back out. The improvements seem more than worth this. I've also worked with Craig to update the comments to no longer be actively contradicted by the code. =[ Some of this still remains a mystery to both Craig and myself, but this seems like a large step in the direction of consistency and slightly more accurate comments. Many thanks to Craig for help figuring out this nasty stuff. Differential Revision: https://reviews.llvm.org/D37096 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311737 91177308-0d34-0410-b5e6-96231b3b80d8
478 lines
15 KiB
LLVM
478 lines
15 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -show-mc-encoding | FileCheck %s
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@d = global i8 0, align 1
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define i32 @test1(i32 %X, i32* %y) nounwind {
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; CHECK-LABEL: test1:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: cmpl $0, (%rsi) ## encoding: [0x83,0x3e,0x00]
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; CHECK-NEXT: je LBB0_2 ## encoding: [0x74,A]
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; CHECK-NEXT: ## fixup A - offset: 1, value: LBB0_2-1, kind: FK_PCRel_1
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; CHECK-NEXT: ## BB#1: ## %cond_true
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; CHECK-NEXT: movl $1, %eax ## encoding: [0xb8,0x01,0x00,0x00,0x00]
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; CHECK-NEXT: retq ## encoding: [0xc3]
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; CHECK-NEXT: LBB0_2: ## %ReturnBlock
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; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
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; CHECK-NEXT: retq ## encoding: [0xc3]
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; CHECK-NEXT: ## -- End function
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entry:
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%tmp = load i32, i32* %y
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%tmp.upgrd.1 = icmp eq i32 %tmp, 0
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br i1 %tmp.upgrd.1, label %ReturnBlock, label %cond_true
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cond_true:
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ret i32 1
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ReturnBlock:
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ret i32 0
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}
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define i32 @test2(i32 %X, i32* %y) nounwind {
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; CHECK-LABEL: test2:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: testl $536870911, (%rsi) ## encoding: [0xf7,0x06,0xff,0xff,0xff,0x1f]
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; CHECK-NEXT: ## imm = 0x1FFFFFFF
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; CHECK-NEXT: je LBB1_2 ## encoding: [0x74,A]
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; CHECK-NEXT: ## fixup A - offset: 1, value: LBB1_2-1, kind: FK_PCRel_1
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; CHECK-NEXT: ## BB#1: ## %cond_true
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; CHECK-NEXT: movl $1, %eax ## encoding: [0xb8,0x01,0x00,0x00,0x00]
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; CHECK-NEXT: retq ## encoding: [0xc3]
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; CHECK-NEXT: LBB1_2: ## %ReturnBlock
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; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
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; CHECK-NEXT: retq ## encoding: [0xc3]
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; CHECK-NEXT: ## -- End function
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entry:
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%tmp = load i32, i32* %y
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%tmp1 = shl i32 %tmp, 3
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%tmp1.upgrd.2 = icmp eq i32 %tmp1, 0
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br i1 %tmp1.upgrd.2, label %ReturnBlock, label %cond_true
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cond_true:
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ret i32 1
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ReturnBlock:
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ret i32 0
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}
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define i8 @test2b(i8 %X, i8* %y) nounwind {
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; CHECK-LABEL: test2b:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: testb $31, (%rsi) ## encoding: [0xf6,0x06,0x1f]
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; CHECK-NEXT: je LBB2_2 ## encoding: [0x74,A]
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; CHECK-NEXT: ## fixup A - offset: 1, value: LBB2_2-1, kind: FK_PCRel_1
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; CHECK-NEXT: ## BB#1: ## %cond_true
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; CHECK-NEXT: movb $1, %al ## encoding: [0xb0,0x01]
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; CHECK-NEXT: retq ## encoding: [0xc3]
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; CHECK-NEXT: LBB2_2: ## %ReturnBlock
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; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
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; CHECK-NEXT: retq ## encoding: [0xc3]
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; CHECK-NEXT: ## -- End function
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entry:
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%tmp = load i8, i8* %y
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%tmp1 = shl i8 %tmp, 3
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%tmp1.upgrd.2 = icmp eq i8 %tmp1, 0
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br i1 %tmp1.upgrd.2, label %ReturnBlock, label %cond_true
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cond_true:
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ret i8 1
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ReturnBlock:
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ret i8 0
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}
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define i64 @test3(i64 %x) nounwind {
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; CHECK-LABEL: test3:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
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; CHECK-NEXT: testq %rdi, %rdi ## encoding: [0x48,0x85,0xff]
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; CHECK-NEXT: sete %al ## encoding: [0x0f,0x94,0xc0]
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; CHECK-NEXT: retq ## encoding: [0xc3]
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; CHECK-NEXT: ## -- End function
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entry:
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%t = icmp eq i64 %x, 0
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%r = zext i1 %t to i64
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ret i64 %r
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}
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define i64 @test4(i64 %x) nounwind {
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; CHECK-LABEL: test4:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
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; CHECK-NEXT: testq %rdi, %rdi ## encoding: [0x48,0x85,0xff]
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; CHECK-NEXT: setle %al ## encoding: [0x0f,0x9e,0xc0]
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; CHECK-NEXT: retq ## encoding: [0xc3]
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; CHECK-NEXT: ## -- End function
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entry:
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%t = icmp slt i64 %x, 1
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%r = zext i1 %t to i64
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ret i64 %r
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}
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define i32 @test5(double %A) nounwind {
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; CHECK-LABEL: test5:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: ucomisd {{.*}}(%rip), %xmm0 ## encoding: [0x66,0x0f,0x2e,0x05,A,A,A,A]
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; CHECK-NEXT: ## fixup A - offset: 4, value: LCPI5_0-4, kind: reloc_riprel_4byte
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; CHECK-NEXT: ja LBB5_3 ## encoding: [0x77,A]
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; CHECK-NEXT: ## fixup A - offset: 1, value: LBB5_3-1, kind: FK_PCRel_1
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; CHECK-NEXT: ## BB#1: ## %entry
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; CHECK-NEXT: ucomisd {{.*}}(%rip), %xmm0 ## encoding: [0x66,0x0f,0x2e,0x05,A,A,A,A]
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; CHECK-NEXT: ## fixup A - offset: 4, value: LCPI5_1-4, kind: reloc_riprel_4byte
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; CHECK-NEXT: jb LBB5_3 ## encoding: [0x72,A]
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; CHECK-NEXT: ## fixup A - offset: 1, value: LBB5_3-1, kind: FK_PCRel_1
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; CHECK-NEXT: ## BB#2: ## %bb12
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; CHECK-NEXT: movl $32, %eax ## encoding: [0xb8,0x20,0x00,0x00,0x00]
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; CHECK-NEXT: retq ## encoding: [0xc3]
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; CHECK-NEXT: LBB5_3: ## %bb8
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; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
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; CHECK-NEXT: jmp _foo ## TAILCALL
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; CHECK-NEXT: ## encoding: [0xeb,A]
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; CHECK-NEXT: ## fixup A - offset: 1, value: _foo-1, kind: FK_PCRel_1
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; CHECK-NEXT: ## -- End function
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entry:
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%tmp2 = fcmp ogt double %A, 1.500000e+02
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%tmp5 = fcmp ult double %A, 7.500000e+01
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%bothcond = or i1 %tmp2, %tmp5
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br i1 %bothcond, label %bb8, label %bb12
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bb8:
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%tmp9 = tail call i32 (...) @foo() nounwind
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ret i32 %tmp9
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bb12:
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ret i32 32
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}
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declare i32 @foo(...)
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define i32 @test6() nounwind align 2 {
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; CHECK-LABEL: test6:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: cmpq $0, -{{[0-9]+}}(%rsp) ## encoding: [0x48,0x83,0x7c,0x24,0xf8,0x00]
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; CHECK-NEXT: je LBB6_1 ## encoding: [0x74,A]
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; CHECK-NEXT: ## fixup A - offset: 1, value: LBB6_1-1, kind: FK_PCRel_1
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; CHECK-NEXT: ## BB#2: ## %F
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; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
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; CHECK-NEXT: retq ## encoding: [0xc3]
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; CHECK-NEXT: LBB6_1: ## %T
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; CHECK-NEXT: movl $1, %eax ## encoding: [0xb8,0x01,0x00,0x00,0x00]
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; CHECK-NEXT: retq ## encoding: [0xc3]
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; CHECK-NEXT: ## -- End function
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entry:
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%A = alloca { i64, i64 }, align 8
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%B = getelementptr inbounds { i64, i64 }, { i64, i64 }* %A, i64 0, i32 1
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%C = load i64, i64* %B
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%D = icmp eq i64 %C, 0
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br i1 %D, label %T, label %F
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T:
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ret i32 1
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F:
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ret i32 0
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}
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define i32 @test7(i64 %res) nounwind {
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; CHECK-LABEL: test7:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
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; CHECK-NEXT: shrq $32, %rdi ## encoding: [0x48,0xc1,0xef,0x20]
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; CHECK-NEXT: sete %al ## encoding: [0x0f,0x94,0xc0]
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; CHECK-NEXT: retq ## encoding: [0xc3]
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; CHECK-NEXT: ## -- End function
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entry:
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%lnot = icmp ult i64 %res, 4294967296
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%lnot.ext = zext i1 %lnot to i32
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ret i32 %lnot.ext
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}
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define i32 @test8(i64 %res) nounwind {
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; CHECK-LABEL: test8:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: shrq $32, %rdi ## encoding: [0x48,0xc1,0xef,0x20]
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; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
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; CHECK-NEXT: cmpq $3, %rdi ## encoding: [0x48,0x83,0xff,0x03]
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; CHECK-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0]
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; CHECK-NEXT: retq ## encoding: [0xc3]
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; CHECK-NEXT: ## -- End function
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entry:
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%lnot = icmp ult i64 %res, 12884901888
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%lnot.ext = zext i1 %lnot to i32
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ret i32 %lnot.ext
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}
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define i32 @test9(i64 %res) nounwind {
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; CHECK-LABEL: test9:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
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; CHECK-NEXT: shrq $33, %rdi ## encoding: [0x48,0xc1,0xef,0x21]
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; CHECK-NEXT: sete %al ## encoding: [0x0f,0x94,0xc0]
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; CHECK-NEXT: retq ## encoding: [0xc3]
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; CHECK-NEXT: ## -- End function
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entry:
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%lnot = icmp ult i64 %res, 8589934592
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%lnot.ext = zext i1 %lnot to i32
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ret i32 %lnot.ext
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}
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define i32 @test10(i64 %res) nounwind {
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; CHECK-LABEL: test10:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
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; CHECK-NEXT: shrq $32, %rdi ## encoding: [0x48,0xc1,0xef,0x20]
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; CHECK-NEXT: setne %al ## encoding: [0x0f,0x95,0xc0]
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; CHECK-NEXT: retq ## encoding: [0xc3]
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; CHECK-NEXT: ## -- End function
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entry:
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%lnot = icmp uge i64 %res, 4294967296
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%lnot.ext = zext i1 %lnot to i32
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ret i32 %lnot.ext
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}
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define i32 @test11(i64 %l) nounwind {
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; CHECK-LABEL: test11:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: shrq $47, %rdi ## encoding: [0x48,0xc1,0xef,0x2f]
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; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
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; CHECK-NEXT: cmpq $1, %rdi ## encoding: [0x48,0x83,0xff,0x01]
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; CHECK-NEXT: sete %al ## encoding: [0x0f,0x94,0xc0]
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; CHECK-NEXT: retq ## encoding: [0xc3]
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; CHECK-NEXT: ## -- End function
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entry:
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%shr.mask = and i64 %l, -140737488355328
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%cmp = icmp eq i64 %shr.mask, 140737488355328
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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}
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define i32 @test12() ssp uwtable {
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; CHECK-LABEL: test12:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: pushq %rax ## encoding: [0x50]
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; CHECK-NEXT: Lcfi0:
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: callq _test12b ## encoding: [0xe8,A,A,A,A]
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; CHECK-NEXT: ## fixup A - offset: 1, value: _test12b-4, kind: FK_PCRel_4
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; CHECK-NEXT: testb %al, %al ## encoding: [0x84,0xc0]
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; CHECK-NEXT: je LBB12_2 ## encoding: [0x74,A]
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; CHECK-NEXT: ## fixup A - offset: 1, value: LBB12_2-1, kind: FK_PCRel_1
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; CHECK-NEXT: ## BB#1: ## %T
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; CHECK-NEXT: movl $1, %eax ## encoding: [0xb8,0x01,0x00,0x00,0x00]
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; CHECK-NEXT: popq %rcx ## encoding: [0x59]
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; CHECK-NEXT: retq ## encoding: [0xc3]
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; CHECK-NEXT: LBB12_2: ## %F
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; CHECK-NEXT: movl $2, %eax ## encoding: [0xb8,0x02,0x00,0x00,0x00]
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; CHECK-NEXT: popq %rcx ## encoding: [0x59]
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; CHECK-NEXT: retq ## encoding: [0xc3]
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entry:
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%tmp1 = call zeroext i1 @test12b()
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br i1 %tmp1, label %T, label %F
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T:
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ret i32 1
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F:
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ret i32 2
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}
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declare zeroext i1 @test12b()
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define i32 @test13(i32 %mask, i32 %base, i32 %intra) {
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; CHECK-LABEL: test13:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: testb $8, %dil ## encoding: [0x40,0xf6,0xc7,0x08]
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; CHECK-NEXT: cmovnel %edx, %esi ## encoding: [0x0f,0x45,0xf2]
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; CHECK-NEXT: movl %esi, %eax ## encoding: [0x89,0xf0]
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; CHECK-NEXT: retq ## encoding: [0xc3]
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entry:
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%and = and i32 %mask, 8
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%tobool = icmp ne i32 %and, 0
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%cond = select i1 %tobool, i32 %intra, i32 %base
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ret i32 %cond
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}
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define i32 @test14(i32 %mask, i32 %base, i32 %intra) {
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; CHECK-LABEL: test14:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: shrl $7, %edi ## encoding: [0xc1,0xef,0x07]
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; CHECK-NEXT: cmovnsl %edx, %esi ## encoding: [0x0f,0x49,0xf2]
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; CHECK-NEXT: movl %esi, %eax ## encoding: [0x89,0xf0]
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; CHECK-NEXT: retq ## encoding: [0xc3]
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entry:
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%s = lshr i32 %mask, 7
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%tobool = icmp sgt i32 %s, -1
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%cond = select i1 %tobool, i32 %intra, i32 %base
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ret i32 %cond
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}
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; PR19964
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define zeroext i1 @test15(i32 %bf.load, i32 %n) {
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; CHECK-LABEL: test15:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: shrl $16, %edi ## encoding: [0xc1,0xef,0x10]
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; CHECK-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1]
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; CHECK-NEXT: cmpl %esi, %edi ## encoding: [0x39,0xf7]
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; CHECK-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0]
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; CHECK-NEXT: orb %cl, %al ## encoding: [0x08,0xc8]
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; CHECK-NEXT: retq ## encoding: [0xc3]
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entry:
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%bf.lshr = lshr i32 %bf.load, 16
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%cmp2 = icmp eq i32 %bf.lshr, 0
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%cmp5 = icmp uge i32 %bf.lshr, %n
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%.cmp5 = or i1 %cmp2, %cmp5
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ret i1 %.cmp5
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}
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define i8 @test16(i16 signext %L) {
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; CHECK-LABEL: test16:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: testw %di, %di ## encoding: [0x66,0x85,0xff]
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; CHECK-NEXT: setns %al ## encoding: [0x0f,0x99,0xc0]
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; CHECK-NEXT: retq ## encoding: [0xc3]
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entry:
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%lshr = lshr i16 %L, 15
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%trunc = trunc i16 %lshr to i8
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%not = xor i8 %trunc, 1
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ret i8 %not
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}
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define i8 @test17(i32 %L) {
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; CHECK-LABEL: test17:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: testl %edi, %edi ## encoding: [0x85,0xff]
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; CHECK-NEXT: setns %al ## encoding: [0x0f,0x99,0xc0]
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; CHECK-NEXT: retq ## encoding: [0xc3]
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entry:
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%lshr = lshr i32 %L, 31
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%trunc = trunc i32 %lshr to i8
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%not = xor i8 %trunc, 1
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ret i8 %not
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}
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define i8 @test18(i64 %L) {
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; CHECK-LABEL: test18:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: testq %rdi, %rdi ## encoding: [0x48,0x85,0xff]
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; CHECK-NEXT: setns %al ## encoding: [0x0f,0x99,0xc0]
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; CHECK-NEXT: retq ## encoding: [0xc3]
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entry:
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%lshr = lshr i64 %L, 63
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%trunc = trunc i64 %lshr to i8
|
|
%not = xor i8 %trunc, 1
|
|
ret i8 %not
|
|
|
|
}
|
|
|
|
define zeroext i1 @test19(i32 %L) {
|
|
; CHECK-LABEL: test19:
|
|
; CHECK: ## BB#0: ## %entry
|
|
; CHECK-NEXT: testl %edi, %edi ## encoding: [0x85,0xff]
|
|
; CHECK-NEXT: setns %al ## encoding: [0x0f,0x99,0xc0]
|
|
; CHECK-NEXT: retq ## encoding: [0xc3]
|
|
entry:
|
|
%lshr = lshr i32 %L, 31
|
|
%trunc = trunc i32 %lshr to i1
|
|
%not = xor i1 %trunc, true
|
|
ret i1 %not
|
|
|
|
}
|
|
|
|
; This test failed due to incorrect handling of "shift + icmp" sequence
|
|
define void @test20(i32 %bf.load, i8 %x1, i8* %b_addr) {
|
|
; CHECK-LABEL: test20:
|
|
; CHECK: ## BB#0: ## %entry
|
|
; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
|
|
; CHECK-NEXT: testl $16777215, %edi ## encoding: [0xf7,0xc7,0xff,0xff,0xff,0x00]
|
|
; CHECK-NEXT: ## imm = 0xFFFFFF
|
|
; CHECK-NEXT: setne %al ## encoding: [0x0f,0x95,0xc0]
|
|
; CHECK-NEXT: movzbl %sil, %ecx ## encoding: [0x40,0x0f,0xb6,0xce]
|
|
; CHECK-NEXT: addl %eax, %ecx ## encoding: [0x01,0xc1]
|
|
; CHECK-NEXT: setne (%rdx) ## encoding: [0x0f,0x95,0x02]
|
|
; CHECK-NEXT: testl $16777215, %edi ## encoding: [0xf7,0xc7,0xff,0xff,0xff,0x00]
|
|
; CHECK-NEXT: ## imm = 0xFFFFFF
|
|
; CHECK-NEXT: setne {{.*}}(%rip) ## encoding: [0x0f,0x95,0x05,A,A,A,A]
|
|
; CHECK-NEXT: ## fixup A - offset: 3, value: _d-4, kind: reloc_riprel_4byte
|
|
; CHECK-NEXT: retq ## encoding: [0xc3]
|
|
entry:
|
|
%bf.shl = shl i32 %bf.load, 8
|
|
%bf.ashr = ashr exact i32 %bf.shl, 8
|
|
%tobool4 = icmp ne i32 %bf.ashr, 0
|
|
%conv = zext i1 %tobool4 to i32
|
|
%conv6 = zext i8 %x1 to i32
|
|
%add = add nuw nsw i32 %conv, %conv6
|
|
%tobool7 = icmp ne i32 %add, 0
|
|
%frombool = zext i1 %tobool7 to i8
|
|
store i8 %frombool, i8* %b_addr, align 1
|
|
%tobool14 = icmp ne i32 %bf.shl, 0
|
|
%frombool15 = zext i1 %tobool14 to i8
|
|
store i8 %frombool15, i8* @d, align 1
|
|
ret void
|
|
|
|
}
|
|
|
|
define i32 @test21(i64 %val) {
|
|
; CHECK-LABEL: test21:
|
|
; CHECK: ## BB#0: ## %entry
|
|
; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
|
|
; CHECK-NEXT: shrq $41, %rdi ## encoding: [0x48,0xc1,0xef,0x29]
|
|
; CHECK-NEXT: setne %al ## encoding: [0x0f,0x95,0xc0]
|
|
; CHECK-NEXT: retq ## encoding: [0xc3]
|
|
entry:
|
|
%and = and i64 %val, -2199023255552
|
|
%cmp = icmp ne i64 %and, 0
|
|
%ret = zext i1 %cmp to i32
|
|
ret i32 %ret
|
|
|
|
}
|
|
|
|
; AND-to-SHR transformation is enabled for eq/ne condition codes only.
|
|
define i32 @test22(i64 %val) {
|
|
; CHECK-LABEL: test22:
|
|
; CHECK: ## BB#0: ## %entry
|
|
; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
|
|
; CHECK-NEXT: retq ## encoding: [0xc3]
|
|
entry:
|
|
%and = and i64 %val, -2199023255552
|
|
%cmp = icmp ult i64 %and, 0
|
|
%ret = zext i1 %cmp to i32
|
|
ret i32 %ret
|
|
|
|
}
|
|
|
|
define i32 @test23(i64 %val) {
|
|
; CHECK-LABEL: test23:
|
|
; CHECK: ## BB#0: ## %entry
|
|
; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
|
|
; CHECK-NEXT: testq $-1048576, %rdi ## encoding: [0x48,0xf7,0xc7,0x00,0x00,0xf0,0xff]
|
|
; CHECK-NEXT: ## imm = 0xFFF00000
|
|
; CHECK-NEXT: setne %al ## encoding: [0x0f,0x95,0xc0]
|
|
; CHECK-NEXT: retq ## encoding: [0xc3]
|
|
entry:
|
|
%and = and i64 %val, -1048576
|
|
%cmp = icmp ne i64 %and, 0
|
|
%ret = zext i1 %cmp to i32
|
|
ret i32 %ret
|
|
|
|
}
|
|
|
|
define i32 @test24(i64 %val) {
|
|
; CHECK-LABEL: test24:
|
|
; CHECK: ## BB#0: ## %entry
|
|
; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
|
|
; CHECK-NEXT: shlq $16, %rdi ## encoding: [0x48,0xc1,0xe7,0x10]
|
|
; CHECK-NEXT: setne %al ## encoding: [0x0f,0x95,0xc0]
|
|
; CHECK-NEXT: retq ## encoding: [0xc3]
|
|
entry:
|
|
%and = and i64 %val, 281474976710655
|
|
%cmp = icmp ne i64 %and, 0
|
|
%ret = zext i1 %cmp to i32
|
|
ret i32 %ret
|
|
|
|
}
|