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80b5f5982a
This adds support for sext in foldLogicCastConstant. This is a prerequisite for D36214. Differential Revision: https://reviews.llvm.org/D36234 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309880 91177308-0d34-0410-b5e6-96231b3b80d8
73 lines
2.8 KiB
LLVM
73 lines
2.8 KiB
LLVM
; RUN: opt -S -slp-threshold=-6 -slp-vectorizer -instcombine < %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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; These tests ensure that we do not regress due to PR31243. Note that we set
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; the SLP threshold to force vectorization even when not profitable.
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; CHECK-LABEL: @PR31243_zext
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;
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; When computing minimum sizes, if we can prove the sign bit is zero, we can
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; zero-extend the roots back to their original sizes.
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;
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; CHECK: %[[OR:.+]] = or <2 x i8> {{.*}}, <i8 1, i8 1>
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; CHECK: %[[E0:.+]] = extractelement <2 x i8> %[[OR]], i32 0
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; CHECK: %[[Z0:.+]] = zext i8 %[[E0]] to i64
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; CHECK: getelementptr inbounds i8, i8* %ptr, i64 %[[Z0]]
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; CHECK: %[[E1:.+]] = extractelement <2 x i8> %[[OR]], i32 1
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; CHECK: %[[Z1:.+]] = zext i8 %[[E1]] to i64
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; CHECK: getelementptr inbounds i8, i8* %ptr, i64 %[[Z1]]
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;
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define i8 @PR31243_zext(i8 %v0, i8 %v1, i8 %v2, i8 %v3, i8* %ptr) {
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entry:
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%tmp0 = zext i8 %v0 to i32
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%tmp1 = zext i8 %v1 to i32
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%tmp2 = or i32 %tmp0, 1
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%tmp3 = or i32 %tmp1, 1
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%tmp4 = getelementptr inbounds i8, i8* %ptr, i32 %tmp2
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%tmp5 = getelementptr inbounds i8, i8* %ptr, i32 %tmp3
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%tmp6 = load i8, i8* %tmp4
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%tmp7 = load i8, i8* %tmp5
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%tmp8 = add i8 %tmp6, %tmp7
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ret i8 %tmp8
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}
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; CHECK-LABEL: @PR31243_sext
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;
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; When computing minimum sizes, if we cannot prove the sign bit is zero, we
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; have to include one extra bit for signedness since we will sign-extend the
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; roots.
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;
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; FIXME: This test is suboptimal since the compuation can be performed in i8.
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; In general, we need to add an extra bit to the maximum bit width only
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; if we can't prove that the upper bit of the original type is equal to
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; the upper bit of the proposed smaller type. If these two bits are the
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; same (either zero or one) we know that sign-extending from the smaller
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; type will result in the same value. Since we don't yet perform this
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; optimization, we make the proposed smaller type (i8) larger (i16) to
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; ensure correctness.
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;
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; CHECK: %[[OR:.+]] = or <2 x i8> {{.*}}, <i8 1, i8 1>
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; CHECK: %[[S0:.+]] = sext <2 x i8> %[[OR]] to <2 x i16>
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; CHECK: %[[E0:.+]] = extractelement <2 x i16> %[[S0]], i32 0
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; CHECK: %[[S1:.+]] = sext i16 %[[E0]] to i64
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; CHECK: getelementptr inbounds i8, i8* %ptr, i64 %[[S1]]
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; CHECK: %[[E1:.+]] = extractelement <2 x i16> %[[S0]], i32 1
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; CHECK: %[[S2:.+]] = sext i16 %[[E1]] to i64
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; CHECK: getelementptr inbounds i8, i8* %ptr, i64 %[[S2]]
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;
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define i8 @PR31243_sext(i8 %v0, i8 %v1, i8 %v2, i8 %v3, i8* %ptr) {
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entry:
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%tmp0 = sext i8 %v0 to i32
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%tmp1 = sext i8 %v1 to i32
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%tmp2 = or i32 %tmp0, 1
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%tmp3 = or i32 %tmp1, 1
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%tmp4 = getelementptr inbounds i8, i8* %ptr, i32 %tmp2
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%tmp5 = getelementptr inbounds i8, i8* %ptr, i32 %tmp3
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%tmp6 = load i8, i8* %tmp4
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%tmp7 = load i8, i8* %tmp5
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%tmp8 = add i8 %tmp6, %tmp7
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ret i8 %tmp8
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}
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